A Statistical Model for DPA with Novel Algorithmic Confusion Analysis

Fei, Yunsi; Luo, Qiasi; Ding, A. Adam

doi:10.1007/978-3-642-33027-8_14

Cited by 78 publications

(96 citation statements)

References 24 publications

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“…Also, it will be interesting to precisely study how the (minimum) transparency order impacts the efficiency of attacks like the template attacks [9], the linear regression attacks [10] or the MIA [14], especially when it is combined with masking. Eventually, the (revised) notion of transparency order seems to share several similarities with the notion of confusion coefficient introduced in [12] and recently used in [23] to design DPA resistant s-boxes. A comparison analysis between the two approaches appears to be a promising subject for future research on this topic Table 2.…”

Section: Resultsmentioning

confidence: 97%

Redefining the transparency order

Chakraborty

Sarkar²,

Maitra

et al. 2016

Des. Codes Cryptogr.

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Abstract. In this paper, we consider the multi-bit Differential Power Analysis (DPA) in the Hamming weight model. In this regard, we revisit the definition of Transparency Order (TO) from the work of Prouff (FSE 2005) and find that the definition has certain limitations. Although this work has been quite well referred in the literature, surprisingly, these limitations remained unexplored for almost a decade. We analyse the definition from scratch, modify it and finally provide a definition with better insight that can theoretically capture DPA in Hamming weight model for hardware implementation with precharge logic. At the end, we confront the notion of (revised) transparency order with attack simulations in order to study to what extent the low transparency order of an s-box impacts the efficiency of a side channel attack against its processing. To the best of our knowledge, this is the first time that such a critical analysis is conducted (even considering the original notion of Prouff). It practically confirms that the transparency order is indeed related to the resistance of the s-box against side-channel attacks, but it also shows that it is not sufficient alone to directly achieve a satisfying level of security. Regarding this point, our conclusion is that the (revised) transparency order is a valuable criterion to consider when designing a cryptographic algorithm, and even if it does not preclude to also use classical countermeasures like masking or shuffling, it enables to improve their effectiveness.

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Section: Resultsmentioning

confidence: 97%

Redefining the transparency order

Chakraborty

Sarkar²,

Maitra

et al. 2016

Des. Codes Cryptogr.

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“…We use 700, 000 traces to find correlations based on Models I and II. We show one power trace and Pearson correlation [13,14] results in Fig. 4.…”

Section: Side-channel Leakage Modelsmentioning

confidence: 99%

Power analysis attack on hardware implementation of MAC-Keccak on FPGAs

Luo

Fei

Fang

et al. 2014

2014 International Conference on ReConFigurable Computing and FPGAs (ReConFig14)

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Abstract. Keccak is the hash function selected by NIST as the new SHA-3 standard. Keccak is built on Sponge construction and it provides a new MAC function called MAC-Keccak. These new algorithms have raised questions with regards to side-channel leakage and analysis attacks of MAC-Keccak. So far there exists prior work on attacks of software implementations of MACKeccak, but there has been no comprehensive side-channel vulnerability assessment of its hardware implementation. In this paper we describe an attack on the θ step of the first round of MACKeccak implemented on an FPGA. We construct several different side-channel leakage models and implement attacks based on them. Our work shows that an unmasked hardware implementation of SHA-3 is vulnerable to power-based side-channel attacks.

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“…σ represents the noise from both the measurement apparatus and other parts of the device that are not related to the intermediate data Z. The side-channel signal-to-noise ratio (SNR) is defined as δ = /σ [28,29], which is a system-inherent side-channel leakage parameter. Fig.…”

Section: Power Leakage Modelmentioning

confidence: 99%

“…According to [29], the success rate (SR) of side-channel attacks and the number of traces needed for attack are directly determined by the SNR of a system. The addition of the protection circuits will therefore affect the SR of power analysis attacks on the protected AES.…”

Section: Power Leakage Modelmentioning

confidence: 99%

Side-channel power analysis of different protection schemes against fault attacks on AES

Luo

Fei

Zhang

et al. 2014

2014 International Conference on ReConFigurable Computing and FPGAs (ReConFig14)

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Abstract. A protection circuit can be added into cryptographic systems to detect both soft errors and injected faults required by Differential Fault Analysis (DFA) attacks. While such protection can improve the reliability of the target devices significantly and counteract DFA, they will also incur extra power consumption and other resource overhead. In this paper, we analyze the sidechannel power leakage of AES protection methods against fault attacks and quantify the amount. We implement six different schemes and launch correlation power analysis attacks on them. The results show that the protection circuits have all increased the power leakage and therefore make the system more vulnerable to power analysis attacks. We further compare different protection schemes in terms of power consumption, area, fault coverage, and side-channel leakage. Our results demonstrate trade-offs among multiple design metrics, and suggest that reliability, security, and costs have to be all considered together in the design phase of cryptographic systems.

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A Statistical Model for DPA with Novel Algorithmic Confusion Analysis

Cited by 78 publications

References 24 publications

Redefining the transparency order

Redefining the transparency order

Power analysis attack on hardware implementation of MAC-Keccak on FPGAs

Side-channel power analysis of different protection schemes against fault attacks on AES

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