A Stackable LTE Chip for Cost-effective 3D Systems

Abstract

Abstract:To address the problem of prohibitive cost of advanced fabrication technologies, one solution consists in reusing masks to address a wide range of ICs. This could be achieved by a modular circuit that can be stacked to build TSV-based 3D systems with processing performance adapted to several applications. This paper focuses on 4G wireless telecom applications. We propose a basic circuit that meets the SISO (Single Input Single Output) transmission mode. By stacking multiple instances of this same circuit, it will be possible to address several MIMO (Multiple Input Multiple Output) modes. The proposed circuit is composed of several processing units interconnected by a 3D NoC and controlled by a host processor. Compared to a 2D reference platform, the proposed circuit keeps at least the same performance and power consumption in the context of 4G telecom applications, while reducing total cost. More generally, our cost analysis shows that 3D integration efficiency depends on the size of the circuit and the stacking option (die-to-die, die-to-wafer and interposer-based stacking).

3D stacking for multi-core architectures: From WIDEIO to distributed caches

“…Multiple-Input-MultipleOutput (MIMO) feature requires computing in parallel up to 4(Tx):4(Rx) antenna schemes while simplified implementation can use simplified scheme like 2:2. As a result, a simple partitioning (Figure 3) can be achieved by designing a single die for computing a 1:1 scheme [10], while the stacking of similar dies will be able to control more antennas (MIMO 2:2, MIMO 4:2, etc…). The proposed circuit is composed of several telecom processing units interconnected by a 3D NoC and controlled by a host processor.…”