2022
DOI: 10.1109/mnano.2021.3126095
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A Spin Wave-Based Approximate 4:2 Compressor: Seeking the most energy-efficient digital computing paradigm

Abstract: I IN THIS ARTICLE, WE PROPOSE an energy-efficient spin wave (SW)-based approximate 4:2 compressor including three-and five-input majority gates. We validate our proposal by means of micromagnetic simulations and assess and compare its performance with state-of-the-art SW 45-nm CMOS and spin-CMOS counterparts. The evaluation results indicate that the proposed compressor consumes 31.5% less energy than its accurate SW-design version. Furthermore, it has the same energy consumption and error rate as a directional… Show more

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Cited by 4 publications
(4 citation statements)
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“…Motivated by the SW interaction potential, researchers have investigated different SW logic gates and circuits [7][8][9][10][11][12][13][14][15][16][17][18] . In 10 , a Mach-Zehnder interferometer has been utilized to design the first experimental SW NOT gate, whereas the Mach-Zehnder interferometer has been used to build different single output gates such as Majority, (N)AND, (N)OR, and X(N)OR gates in 10 .…”
Section: Introductionmentioning
confidence: 99%
See 1 more Smart Citation
“…Motivated by the SW interaction potential, researchers have investigated different SW logic gates and circuits [7][8][9][10][11][12][13][14][15][16][17][18] . In 10 , a Mach-Zehnder interferometer has been utilized to design the first experimental SW NOT gate, whereas the Mach-Zehnder interferometer has been used to build different single output gates such as Majority, (N)AND, (N)OR, and X(N)OR gates in 10 .…”
Section: Introductionmentioning
confidence: 99%
“…Moreover, the unique parallelism feature of the SW technology has been utilized to demonstrate multi-frequency logic gates 8,12 . On the circuit side, different circuits have been illustrated at the conceptual level 14 , simulation level 7,[15][16][17] , and physical millimeter scale level 18 . In [19][20][21][22] , benchmarking of beyond CMOS technologies, e.g., SW, Graphene, SpinFET, has been performed by modelling these devices as a capacitor and parasitics, which is not quite appropriate for the SW case.…”
Section: Introductionmentioning
confidence: 99%
“…Motivated by the SW interaction potential, researchers have investigated different SW logic gates and circuits [7][8][9][10][11][12][13][14][15][16][17][18] . In 10 , a Mach-Zehnder interferometer has been utilized to design the first experimental SW NOT gate, whereas the Mach-Zehnder interferometer has been used to build different single output gates such as Majority, (N)AND, (N)OR, and X(N)OR gates in 10 .…”
Section: Introductionmentioning
confidence: 99%
“…Moreover, the unique parallelism feature of the SW technology has been utilized to demonstrate multi-frequency logic gates 8,12 . On the circuit side, different circuits have been illustrated at the conceptual level 14 , simulation level 7,[15][16][17] , and physical millimeter scale level 18 . In [19][20][21][22] , benchmarking of beyond CMOS technologies, e.g., SW, Graphene, SpinFET, has been performed by modelling these devices as a capacitor and parasitics, which is not quite appropriate for the SW case.…”
Section: Introductionmentioning
confidence: 99%