A solid to solid diffusion technique

Scott, Joanna I.; Olmstead, J.; Greig, W.

doi:10.1109/t-ed.1963.15247

Cited by 8 publications

(1 citation statement)

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“…Solid state arsenic diffusion sources have been studied for a number of years [14][15][16][17]. A blanket doped oxide layer can be applied to the wafer using either arsine-silane oxidation or a spin-on arsenosilicate glass.…”

Section: Process Through First Metallizationmentioning

confidence: 99%

A Silicon and Aluminum Dynamic Memory Technology

Larsen

1980

IBM J. Res. & Dev.

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The Silicon and Aluminum Metal Oxide Semiconductor (SAMOS) technology is presented as a high-yield, low-cost process to make one-device-cell random access memories. The characteristics of the process are a multilayer dielectric gate insulator (oxide-nitride), ap-type polysilicon field shield, and a doped oxide diffusion source. Added yield-enhancing features are backside ion implant gettering, dual dielectric insulators between metal layers, and circuit redundancy. A family of chips is produced using SAMOS, ranging from 18K bits to 64K bits. System features such as on-chip data registers are designed on some chips. The chip technology is merged with "flip-chip" packaging to provide one-inchsquare modules from 72K bits through 512K bits, with typical access times from 90 ns to 300 ns. IntroductionIn October 1978, a new semiconductor memory technology was introduced by IBM Corporation's General Technology Division. This new technology is used to produce a family of chips with densities of 18K-, 32K-, 36K-, and 64K-bits per chip [1]. The Silicon and Aluminum Metal Oxide Semiconductor (SAMOS) process is a metal gate technology which provides a distinct productivity leap over previous IBM 2K-and 4K-bit products through the combination of one-device memory cells [2. 3] and new process concepts. Among these are 1) backside ion implant for leakage control, 2) doped oxide self-aligned diffusion source, 3) multidielectric gate insulator, 4) ptype polysilicon field shield for isolation and cell capacitance, 5) lift-off aluminum metallurgy, and 6) quartz-polyimide passivation between metal layers. The use of new processes poses new challenges in device physics. In particular, the use of a nitride layer in the gate dielectric prevents further oxidation of the gate during polysOicon oxidation and provides low defect densities due to the dual dielectric. At the same time, the hot electron [4] effects were intensified by the use of nitride, and they had to be understood, characterized and brought under routine process control. These effects are not unique to SAMOS, however, and will be encountered by all technologies of small dimensions.

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Section: Process Through First Metallizationmentioning

confidence: 99%