A solder bumping interconnect technology for high-power devices

Brief review of silver sinter-bonding processing for packaging high-temperature power devices

“…In the traditional Si-based power modules, die-attach materials, such as Pb95Sn5 and Pb92.5Sn5Ag2.5, cannot meet the reliability requirements for packaging power devices for high-temperature applications owing to the creep-fatigue concerns [6][7][8] . Moreover, substrate-attach materials, such as Sn96.5Ag3Cu0.5, which have a lower melting temperature than the solder used as die attachment further limit the reliability of SiC power modules for high-temperature applications [9][10] .…”

Flip Chip Assembly Using Carbon Nanotube Bumps and Anisotropic Conductive Adhesive Film

“…Moreover, the requirements imposed by International Technology of Roadmap for Semiconductors (ITRS) for both higher board densities and smaller bumps have resulted in a significant increase in current density, making electromigration one of the limiting factors for high density package applications. The enhanced current density and correspondingly upgraded operating temperatures are critical issues in reliability since these factors facilitate the effects of electromigration [2][3][4]. Therefore, it is realized that the traditional bumps are no longer to fulfill the demands of high-speed and highperformance interconnects.…”

Improved Switching Characteristics of Fast Power MOSFETs Applying Solder Bump Technology

“…Several new packaging technologies have been proposed to overcome the structural limits of the wire bond technology and the related reliability problems (e.g., [1][2][3][4][5][6][7][8]) as well as the reliability and thermal constraints associated with the die solder contact [9]. Only a few ideas have made the transition to market yet, for example, the discrete International Rectifier "DirectFET" [10].…”

“…The latter include solutions with a prestructured circuit board, for example, a copper frame, a flexible substrate, or a second DBC that is usually soldered to the top side of the dice by solder bumping. Examples are the "flip-chip-on-flex" technology [3,4] and the "power ball grid array" technology applying two DBCs [5]. In derivatives of these solutions, copper posts or cylinders are soldered between the two substrates [6,7], which might be necessary for high-voltage applications.…”

“…Embedded power technology [1] Planar power polymer packaging technology [2] Flip-chip-on-flex technology [3,4] DBC sandwich technology [5] Interconnect summarizes the basic material and geometrical data of the described 3D approaches. There are several advantages anticipated from 3D sandwich assemblies including higher power density due to a compact layout, reduced interconnect resistances, and higher current rating compared to wire bonds as well as less parasitic stray inductance giving improved switching behavior and reduced overvoltage.…”