A software-hardware emulator for sensor networks

Zhang, Jingyao; Tang, Yi; Hirve, Sachin; Iyer, Sathiyanarayanan Kulathu; Schaumont, Patrick; Yang, Yaling

doi:10.1109/sahcn.2011.5984928

Cited by 10 publications

(10 citation statements)

References 12 publications

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“…We call our integrated simulation environment the SUNSHINE simulator (Sensor Unified aNalyzer for Software and Hardware in Networked Environments) [11]. We first describe each component of the simulator and then, discuss the SUNSHINE architecture.…”

Section: Sunshine Simulatormentioning

confidence: 99%

“…Through these wireless channels, co-sim nodes interact with other sensor nodes, which are simulated either as co-sim nodes by GEZEL and SimulAVR, or as functional-level nodes by TOSSIM. To maintain the correct causal relationship, the interactions between TOSSIM nodes and co-sim nodes are based on the timing synchronization and cross-domain data exchange techniques, which are explained in detail in [11].…”

Section: Sunshine System Componentsmentioning

confidence: 99%

“…The SUNSHINE simulation environment along with the work presented in this paper is available for download at [15]. An application for this architecture is created as a combination of a software program in nesC with a platform description in GEZEL.…”

Section: Sunshine System Componentsmentioning

confidence: 99%

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A unifying interface abstraction for accelerated computing in sensor nodes

Iyer

Zhang

Yang

et al. 2011

2011 Electronic System Level Synthesis Conference (ESLsyn)

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Hardware-software co-design techniques are very suitable to develop the next generation of sensornet applications, which have high computational demands. By making use of a lowpower FPGA, the peak computational performance of a sensor node can be improved without significant degradation of the standby power dissipation. In this contribution, we present a methodology and tool to enable hardware/software codesign for sensor node application development. We present the integration of nesC, a sensornet programming language, with GEZEL, an easy-to-use hardware description language. We describe the hardware/software interface at different levels of abstraction: at the level of the design language, at the level of the co-simulator, and in the hardware implementation. We use a layered, uniform approach that is particularly suited to deal with the heterogeneous interfaces typically found on small embedded processors. We illustrate the strengths of our approach by means of a prototype application: the integration of a hardware-accelerated crypto-application in a nesC application.

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Section: Sunshine Simulatormentioning

confidence: 99%

Section: Sunshine System Componentsmentioning

confidence: 99%

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A unifying interface abstraction for accelerated computing in sensor nodes

Iyer

Zhang

Yang

et al. 2011

2011 Electronic System Level Synthesis Conference (ESLsyn)

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“…The methodology can support different processing units, such as MCUs, and FPGAs, to serve as either processors or coprocessors. 2) We use a sensor network emulator SUNSHINE [1] to simulate multiprocessor sensor nodes' behaviors in wireless networks to demonstrate the effectiveness of the design methodology. 3) We setup a testbed to demonstrate our methodology.…”

Section: Introductionmentioning

confidence: 99%

“…Resource sharing is handled transparently through a shared-bus communication architecture. We demonstrate our methodology, through a heterogeneous sensor node simulator called SUNSHINE [1] for an application running the sensor nodes. We validate SUNSHINE by demonstrating the applications on a multiprocessor sensor node's testbed, which consists of a FPGA, a microcontroller and a radio front-end.…”

mentioning

confidence: 99%

Hardware-software co-design for heterogeneous multiprocessor sensor nodes

Zhang

Iyer

Zheng

et al. 2014

2014 IEEE Global Communications Conference

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Abstract-To meet the needs of innovative sensor network applications, sensor nodes have long evolved from underpowered single microcontroller designs into complex architectures that accommodate multiple processors and Field Programmable Gate Arrays (FPGAs). We address the problem of conceiving and implementing programs for such sensor node architectures. We rely on a universal, layered hardware/software interface that provides seamless interconnection between tasks running on a micro-controller and tasks running on a FPGA. Resource sharing is handled transparently through a shared-bus communication architecture. We demonstrate our methodology, through a heterogeneous sensor node simulator called SUNSHINE [1] for an application running the sensor nodes. We validate SUNSHINE by demonstrating the applications on a multiprocessor sensor node's testbed, which consists of a FPGA, a microcontroller and a radio front-end.

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Simulators and Emulators for WSNs

Fahmy

2016

Signals and Communication Technology

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Simulation is acting … Acting is not typical of real-life. WSN Testbeds, Simulators, and EmulatorsTestbeds, simulators, and emulators, are effective tools to evaluate algorithms and protocols at design, development and implementation stages. Many of these tools are available, each with different features, characteristics, models and architectures for performance testing of WSNs. They are the focus of this book, as discussed in the previous chapter and accomplished in this one. It is arduous for a researcher or a practitioner to choose an appropriate tool for performance evaluation without the knowledge of the available tools, their features, as well as the pros and cons. Similarly, efforts to improve existing simulators or designing a new one require detailed understanding of useful tools readily available. This necessitates comprehensive horizontal and vertical analysis among competitors at different stages. For vertical validation of experiments, a singular approach for conducting simulation, emulation, and real world experiments in mobile ad hoc networks using a single tool is proposed in (Krop et al. 2007). As such, vertical analysis complements horizontal analysis that is performed by investigating different testbeds at almost the same level of abstraction. Recognizing the immense and diverse literature available, this chapter aims at clarifying in full details all concepts and features related to modeling and simulation, simulators and emulators.Studying and analyzing WSNs goes through different phases and approaches, starting theoretical by simulation, ending up practical via testbeds, or working midway as in emulation. The basic differentiation, as shown in Fig. 6.1, can be outlined in what follows (Coulson et al. 2012):• Physical testbeds as detailed in the previous chapter excel at high-fidelity evaluation of mature WSN designs, as well as detailed planning for real-world deployments. However, physical testbeds for WSN systems tend to be small in

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A software-hardware emulator for sensor networks

Cited by 10 publications

References 12 publications

A unifying interface abstraction for accelerated computing in sensor nodes

A unifying interface abstraction for accelerated computing in sensor nodes

Hardware-software co-design for heterogeneous multiprocessor sensor nodes

Simulators and Emulators for WSNs

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