A Single-Stage AC/DC Converter with High Power Factor, Regulated Bus Voltage and Output Voltage

Lu, Dylan Dah-Chuan; Lu, Herbert Ho-Ching; Pjevalica, V.

doi:10.1109/iecon.2007.4459911

Cited by 12 publications

(15 citation statements)

References 7 publications

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“…5(a), a value of L o = 15 μH is chosen to provide some margin. It should be noted that such a value is considerably higher than what is typically found in most other single-stage full-bridge converters, which must operate with very low output inductor values to prevent the dc bus voltage from becoming excessive [2], [9], [12]- [14], [16].…”

Section: A Determine a Value For Output Inductor L Omentioning

confidence: 97%

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Analysis and design of a single-stage three-level PFC AC-DC-converter

Narimani

Moschopoulos

2012

2012 Twenty-Seventh Annual IEEE Applied Power Electronics Conference and Exposition (APEC)

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In this paper a new three-level single-stage powerfactor-corrected ac/dc converter is presented. The proposed circuit integrates the operation of a boost power factor correction converter and a three-level dc/dc converter into one converter. It does not have the problem of high rising intermediate bus voltages at light load conditions that other single-stage converters have and can operate over a wider load range with significantly less output inductor current ripple; moreover, its input current has little distortion. In the paper, the operation of the new converter is explained in detail and analyzed, its steady-state characteristics are determined, and its design is discussed. Experimental results obtained from a prototype are presented to confirm the feasibility of the new converter.

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Section: A Determine a Value For Output Inductor L Omentioning

confidence: 97%

“…The high dc bus voltage results in the need for higher voltage rated devices and very large bulk capacitors for the dc bus. For example, the converter in [14] has a dc bus voltage of 600 V [2], [9], [12]- [14], [16].…”

Section: Introductionmentioning

confidence: 99%

Analysis and design of a single-stage three-level PFC AC-DC-converter

Narimani

Moschopoulos

2012

2012 Twenty-Seventh Annual IEEE Applied Power Electronics Conference and Exposition (APEC)

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“…For the sake of reducing the cost and improving the efficiency, the single-stage converter circuits have been developed [10][11][12][13][14][15]. Although these single-stage converters have many advantages, their efficiencies are usually not good enough (about 80%).…”

Section: Introductionmentioning

confidence: 99%

Single-Stage Electrolytic-Capacitors-Free AC-to-DC LED Driving Circuit with High-Power-Factor

Chen²

2012

2012 Asia-Pacific Power and Energy Engineering Conference

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This paper proposes a single-stage electrolyticcapacitors-free ac-to-dc driving circuit for light-emitting-diode (LED). A buck-boost power factor corrector (PFC) is integrated with a flyback converter. In this way, the presented circuit can provide not only high power factor (HPF) and low total harmonic distortion (THD). The electrolytic capacitors can be replaced by multi-layer ceramic capacitors (MLCCs) via the conversion circuit integration. Above 0.97 power factor (PF) and 82% efficiency are obtained from a 5W LED bulb driver prototype.

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“…However, CMOS converters in power systems application are quite new in such trend [7,8]. The main objective of power systems converter is to ensure high efficiency, improved power factor and lower total harmonic distortion, with THD of regulation control [9,10]. On-chip converter with low power operation has the advantage of resulting in a high power factor.…”

Section: Introductionmentioning

confidence: 99%

An optimization model of the input current for a variable input voltage in CMOS AC/DC converter

Radzuan

Salleh

Raop

et al. 2014

2014 IEEE Symposium on Computer Applications and Industrial Electronics (ISCAIE)

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An optimization model of the input current for a variable input voltage in CMOS AC/DC converter is proposed in order to achieve regulation control of an AC/DC converter. An input current model of CMOS converter is obtained by applying an average method in converter circuit over one's switching period. This model is implemented in Pspice circuit simulation tool to verify an averaged model of the input current. The resultsshow that the input current exhibits an increasing response to input voltage variation from 0.3 to 1.5 V. The validity of the proposed steady-state model is verified by the given simulation results for a specified design of CMOS converter. A good agreement is obtained between steady-state model and simulation results.

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A Single-Stage AC/DC Converter with High Power Factor, Regulated Bus Voltage and Output Voltage

Cited by 12 publications

References 7 publications

Analysis and design of a single-stage three-level PFC AC-DC-converter

Analysis and design of a single-stage three-level PFC AC-DC-converter

Single-Stage Electrolytic-Capacitors-Free AC-to-DC LED Driving Circuit with High-Power-Factor

An optimization model of the input current for a variable input voltage in CMOS AC/DC converter

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