A single-chip universal digital satellite receiver with 480-MHz IF input

Kwentus, A.Y.; Pai, Patrick; Jaffe, Steven M.; Gómez, R.; Tsai, Shauhyuarn Sean; Kwan, Tom; Hung, Hing-Tsun; Shin, Young Jae; Hue, V.; Cheung, Darwin; Khan, Ramsha; Ward, Christopher; Ku, Mong-Kai; Choi, Kyoung Hwan; Searle, John R.; Bult, Klaas; Cameron, K.; Demas, J.; Reames, C.; Samueli, H.

doi:10.1109/4.799874

Cited by 7 publications

(2 citation statements)

References 7 publications

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“…One of the reasons is that a single chip developed today is often required to comply with more than one standard, and these standards use different RS codes. For example, the RS decoder in [8] supports t = 8, (n, k) = (204, 188) or (146, 130), or t = 5, (n, k) = (125, 115) systematic RS codes since the chip is compatible with multiple standards for digital satellite TV systems. Also, the RS decoder designed for ADSL and cable modems in [7] works with different primitive polynomials g(z) of degree 8 that are used in various ADSL and cable modem standards.…”

Section: Introductionmentioning

confidence: 99%

Universal Reed-Solomon decoders based on the Berlekamp-Massey algorithm

Yan

Sarwate

2004

Proceedings of the 14th ACM Great Lakes Symposium on VLSI

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Universal Reed-Solomon decoders allow flexibility in some or all of the code parameters, and hence lend themselves to applications wherein adaptability and reconfigurability are important considerations. In this paper, we consider universal finite field arithmetics using either canonical polynomial basis or shifted polynomial basis, and propose a high-speed universal Reed-Solomon decoder by modifying the high-speed decoder proposed in [10].

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Section: Introductionmentioning

confidence: 99%

Universal Reed-Solomon decoders based on the Berlekamp-Massey algorithm

Yan

Sarwate

2004

Proceedings of the 14th ACM Great Lakes Symposium on VLSI

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show abstract

“…In this case, it is obvious that the overall hardware complexity can be reduced significantly by replacing several specific RS decoders with a universal one. Also, embedding a RS decoder capable of providing flexible solutions is an attractive method to implement a single chip complying with several standards using different RS codes [5].…”

Section: Introductionmentioning

confidence: 99%

High-speed area-efficient versatile Reed-Solomon decoder design for multi-mode applications

Yuan

Wang

2009

2009 IEEE Workshop on Signal Processing Systems

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In current high-speed communication and storage systems, the increasing demand for providing flexible Reed-Solomon (RS) decoding solutions to multi-mode applications has created the desire of universal RS decoders. In this paper, we present a high-speed area-efficient versatile RS decoder architecture based on recursive degree computationless modified Euclidean (rDCME) algorithm. Targeting at different practical applications, the proposed architecture is developed into two universal RS decoder designs. Arithmetic modification to Montgomery multiplication is exploited for the reduction of area. Compared with existing works, the proposed configurable designs can deliver higher data rate with relatively lower hardware complexity, thus they are good candidates for high-speed multi-mode applications.

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A fully integrated direct-conversion digital satellite tuner in 0.18 μm CMOS

Chen¹,

Zengwang²,

Gu³

2011

J. Semicond.

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A fully integrated direct-conversion digital satellite tuner for DVB-S/S2 and ABS-S applications is presented. A broadband noise-canceling Balun-LNA and passive quadrature mixers provided a high-linearity low noise RF front-end, while the synthesizer integrated the loop filter to reduce the solution cost and system debug time. Fabricated in 0.18 m CMOS, the chip achieves a less than 7.6 dB noise figure over a 900-2150 MHz Lband, while the measured sensitivity for 4.42 MS/s QPSK-3/4 mode is -91 dBm at the PCB connector. The fully integrated integer-N synthesizer operating from 2150 to 4350 MHz achieves less than 1 ı C integrated phase error. The chip consumes about 145 mA at a 3.3 V supply with internal integrated LDOs.

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A single-chip universal digital satellite receiver with 480-MHz IF input

Cited by 7 publications

References 7 publications

Universal Reed-Solomon decoders based on the Berlekamp-Massey algorithm

Universal Reed-Solomon decoders based on the Berlekamp-Massey algorithm

High-speed area-efficient versatile Reed-Solomon decoder design for multi-mode applications

A fully integrated direct-conversion digital satellite tuner in 0.18 μm CMOS

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