A Single-Chip CMOS Bluetooth v2.1 Radio SoC

Si, W.W.; Weber, D.; Abdollahi-Alibeik, S.; Lee, MeeLan; Chang, Ramsay; Doğan, Hakan; Gan, H.; Rajavi, Yashar; Luschas, S.; Ozgur, S.; Husted, P.; Zargari, M.

doi:10.1109/jssc.2008.2005741

Cited by 30 publications

(11 citation statements)

References 14 publications

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“…Contrast this to pulsed-UWB radios where the transmitter power is typically 100x lower than the receiver power [29]. Furthermore, the energy/bit of UWB transmitters is typically around 50 pJ/bit, compared to 25 nJ/bit for Bluetooth [28], and UWB energy/bit is independent of the data rate, as shown by Figure 5. UWB receivers, on the other hand, typically consume 1-to-10 nJ/bit.…”

Section: Asymmetric Wireless Communicationmentioning

confidence: 96%

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Body Sensor Networks: A Holistic Approach From Silicon to Users

et al. 2012

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Abstract-Body sensor networks (BSN) are emerging cyberphysical systems that promise to improve quality of life through improved healthcare, augmented sensing and actuation for the disabled, independent living for the elderly, and reduced healthcare costs. However, the physical nature of BSNs introduces new challenges. The human body is a highly dynamic physical environment that creates constantly changing demands on sensing, actuation, and quality of service. Movement between indoor and outdoor environments and physical movements constantly change the wireless channel characteristics. These dynamic application contexts can also have a dramatic impact on data and resource prioritization. Thus, BSNs must simultaneously deal with rapid changes to both top-down application requirements and bottom-up resource availability. This is made all the more challenging by the wearable nature of BSN devices, which necessitates a vanishingly small size and, therefore, extremely limited hardware resources and power budget. Current research is being performed to develop new principles and techniques for adaptive operation in highly dynamic physical environments, using miniaturized, energy-constrained devices. This paper describes a holistic cross-layer approach that addresses all aspects of the system, from low-level hardware design to higher-level communication and data fusion algorithms, to top-level applications.

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Section: Asymmetric Wireless Communicationmentioning

confidence: 96%

“…Narrowband radios designed to communicate over a range that is less than 10 meters typically have equal power consumption in transmit and receive modes [28]. Contrast this to pulsed-UWB radios where the transmitter power is typically 100x lower than the receiver power [29].…”

Section: Asymmetric Wireless Communicationmentioning

confidence: 99%

Body Sensor Networks: A Holistic Approach From Silicon to Users

et al. 2012

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“…The analog part is designed with differential structure that uses the single 1.8 V supply. The receiver uses the optimized Low-IF (1.5 MHz) architecture which is a trade-off between power and performance in CMOS technology [4], [7], [8]. This block uses the image rejection Gilbert mixer and the controllable AGC.…”

Section: Rf Transceiver and Basebandmentioning

confidence: 99%

A Low Power SOC Architecture for the V2.0+EDR Bluetooth Using a Unified Verification Platform

Kim

Kim²,

Baek

2010

IEICE Trans. Inf. & Syst.

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SUMMARYThis paper presents a low-power System on Chip (SOC) architecture for the v2.0+EDR (Enhanced Data Rate) Bluetooth and its applications. Our design includes a link controller, modem, RF transceiver, Sub-Band Codec (SBC), Expanded Instruction Set Computer (ESIC) processor, and peripherals. To decrease power consumption of the proposed SOC, we reduce data transfer using a dual-port memory, including a power management unit, and a clock gated approach. We also address some of issues and benefits of reusable and unified environment on a centralized data structure and SOC verification platform. This includes flexibility in meeting the final requirements using technology-independent tools wherever possible in various processes and for projects. The other aims of this work are to minimize design efforts by avoiding the same work done twice by different people and to reuse the similar environment and platform for different projects. This chip occupies a die size of 30 mm 2 in 0.18 μm CMOS, and the worst-case current of the total chip is 54 mA. key words: Bluetooth V2.0, enhanced data rate (EDR), low-power architecture, wireless SOC, sub band codec, platform-based design, verification

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“…Instead, the high-frequency content of the modulation signal m[n], which would be suppressed by a narrowband PLL, is either digitally preemphasized before the DDSM [8] or directly applied to a second VCO control port (called two point modulation) [35]. However, these approaches require precise knowledge of the PLL's transfer function to maintain modulation accuracy.…”

Section: Wide-bandwidth Frequency Synthesismentioning

confidence: 99%