A Simplified Method for Patterning Graphene on Dielectric Layers

Abstract

The large-scale formation of patterned, quasi-freestanding graphene structures supported on a dielectric has so far been limited by the need to transfer the graphene onto a suitable substrate and contamination from the associated processing steps. We report μm scale, few-layer graphene structures formed at moderate temperatures (600–700 °C) and supported directly on an interfacial dielectric formed by oxidizing Si layers at the graphene/substrate interface. We show that the thickness of this underlying dielectric support can be tailored further by an additional Si intercalation of the graphene prior to oxidation. This produces quasi-freestanding, patterned graphene on dielectric SiO 2 with a tunable thickness on demand, thus facilitating a new pathway to integrated graphene microelectronics.