A Simplified Analysis of Processor "Look-Ahead" and Simultaneous Operation of a Multi-Module Main Memory

Shemer, J. E.; Gupta, Saransh

doi:10.1109/t-c.1969.222526

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1970

1976

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Cited by 3 publications

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“…Of particular interest are the models discussed in references [5]- [9]. The study in [5] considers the contention in a system consisting of a processor and input-output controller, to be a function of the number of instruction "look-aheads".…”

Section: Introductionmentioning

confidence: 99%

Comments on models of multi-processor multi-memory bank computer systems

Franta¹,

Houle²

1974

Proceedings of the 7th Conference on Winter Simulation - WSC '74

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This paper is concerned with processor degradation produced by access conflicts in multiprocessor, multi-memory bank computer systems. Hardware and software parameters which influence performance are outlined and discussed• The incorporation of these parameters in analytic and simulation modeXs is discussed with a view to the predictive merit of the model• Finally a general simulation model of a multl-processor is presented, and results based on its use are analyzed and compared with those of other models•

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Section: Introductionmentioning

confidence: 99%