A simple power diode model with forward and reverse recovery

Ma, Chao; Lauritzen, P.O.

doi:10.1109/63.261002

Cited by 136 publications

(30 citation statements)

References 3 publications

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“…3.28 and 3.29) for a resistive load, but is reviewed below for the case of an inductive load. More detailed discussions can be found in [140,141]. During this time, I L ramps up with slope V DD /L until t d .…”

Section: H-bridge Motor Driver-ldmos Reverse Recoverymentioning

confidence: 97%

High-Voltage and Power Transistors

El-Kareh¹,

Hutter²

2015

Silicon Analog Components

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This chapter focuses mainly on the drain-extended MOS transistor, DEMOS, for high voltage applications, and on the lateral double-diffused MOS transistor, LDMOS, for high power applications. In both cases, the drain is extended with a lightly-doped region, referred to as the drift region, to sustain the high voltage. The chapter begins with an analysis of the drift region and its optimization, typically by reduced surface-field (RESURF) techniques. The transistor switching performance is then analyzed, followed by a discussion of DEMOS and LDMOS design considerations and characteristics. High-voltage and high-current effects are then described, including quasi-saturation, body current, on-state breakdown, and safe operating area (SOA). The chapter concludes with selected high-voltage device applications. IntroductionThe MOSFETs discussed in Chap. 6 are designed for digital, analog, mixed-signal, and RF applications that operate in the low-to-medium voltage range of about 0.8-6 V. Many analog applications, however, require transistors that can handle voltages above 20 V and currents in the ampere range. Those transistors are referred to as high-voltage and power transistors. This chapter provides a comprehensive analysis of the drain-extended MOS transistor (DEMOS), for high-voltage and low-current applications, and the lateral double-diffused MOS (LDMOS) transistor, LDMOS, for power applications. (The "D" in LDMOS describes the sequential (double) diffusion of boron and arsenic through the same oxide opening, defining a precise channel length (Chap. 9). The "L" means that the current path is parallel to the silicon surface (lateral), as opposed to "V" in VDMOS where the current is nearly vertical to the silicon surface.) Schematic cross sections of both transistors (Table 7.1). The DEMOS is typically processed without added process complexity, whereas the LDMOS requires optimization of the P-body and N-drift regions to achieve high voltages and currents while minimizing the drain-to-source resistance and transistor area.The interest in bipolar, CMOS, and DMOS (BCD) technologies has been driven primarily by the proliferation of portable electronics, automotive electronics, and the need for energy efficiency. These applications cluster around different operating points, with 24 V for portable electronics; 60 V for automotive, solar, and LED backlighting; 85 V for power over Ethernet; 120 V for telecommunication; and 700 V for offline LED lighting, consumer, and industrial applications. As a result, BCD is now the technology of choice to realize power ICs by most integrated device manufacturers (IDM) and foundries [1][2][3][4][5].This chapter focuses mainly on transistors with voltage capabilities in the range of 20-700 V, where the bulk of the product applications lie.

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Section: H-bridge Motor Driver-ldmos Reverse Recoverymentioning

confidence: 97%

High-Voltage and Power Transistors

El-Kareh¹,

Hutter²

2015

Silicon Analog Components

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“…To perform efficiency calculations, both the on-state resistance and gate-charge characteristics must be accurately modeled, especially when a high switching-frequency (fS=3 MHz) buck converter is considered. More specifically, we need to fully account for the switching losses, driver losses, built-in diode forward and reverse recovery losses, and conduction losses [2], [3]. An important issue to take into account when power devices are modeled is the effect of layout parasitics (both resistances and capacitances) on the amount of both the conduction and switching losses [4]- [6].…”

Section: Introductionmentioning

confidence: 99%

Efficiency modeling of wireless power transfer ASICs accounting for layout parasitics

Pagano

Abedinpour

Raciti

et al. 2016

2016 IEEE Energy Conversion Congress and Exposition (ECCE)

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This paper presents a power-loss model for Lateral-Diffused MOSFETs (LDMOSs) in application-specific integrated circuits (ASICs) in the field of wireless power-transfer system applications. Both the transmitter and receiver power-stages integrated in their respective ASIC units were considered, and the total system efficiency was subsequently estimated. Layout parasitics pertaining to the primary and secondary integrated circuits (ICs) have been considered due to their impact on the total system efficiency, and a charge-sheet control model for the LDMOSs of the three power stages has been developed. Thermal effects induced by heating within the two ASICs were also included, as they exert a significant influence on the amount of both conduction and switching losses. Model results and experimental data are compared and show a satisfactory agreement.

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“…Moreover, the simulation possibly leads to large voltage and current overshoots, power losses and EMI phenomena. Some Si pin diode models have been proposed [3,4,5], as the diode model available in PSPICE is unable to predict the actual characteristics of pin structures. The previously developed Si diode models need not only internal structure (thickness, and impurity concentration of the drift region), but also physical parameters (minority carrier life time and carrier mobility) of the diode [3,4,5] for each device.…”

Section: Introductionmentioning

confidence: 99%

Simple circuit model of SiC pin diode composed by using experimental electrical characteristics

Asano

Funaki

Sugawara

et al. 2005

IEICE Electron. Express

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Abstract:In this paper, new simple circuit models for developed SiC pin diodes are proposed. They are based on the electrical characteristics obtained in experiments without any detail information of internal structure and physical parameters. The validity of the circuit models is confirmed by correspondence between simulated characteristics and experimental one. The model installed in the experimental circuit configuration can precisely simulate the waveforms of the reverse recovery current and the forward characteristics. As a result, the proposed model is shown to be appropriate for describing the characteristics of high capability SiC diode module in the circuit operation.

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A simple power diode model with forward and reverse recovery

Cited by 136 publications

References 3 publications

High-Voltage and Power Transistors

High-Voltage and Power Transistors

Efficiency modeling of wireless power transfer ASICs accounting for layout parasitics

Simple circuit model of SiC pin diode composed by using experimental electrical characteristics

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