A SIMD algorithm for the detection of epistatic interactions of any order

Abstract

Epistasis is a phenomenon in which a phenotype outcome is determined by the interaction of genetic variation at two or more loci and it cannot be attributed to the additive combination of effects corresponding to the individual loci. Although it has been more than 100 years since William Bateson introduced this concept, it still is a topic under active research. Locating epistatic interactions is a computationally expensive challenge that involves analyzing an exponentially growing number of combinations. Authors in this field have resorted to a multitude of hardware architectures in order to speed up the search, but little to no attention has been paid to the vector instructions that current CPUs include in their instruction sets. This work extends an existing third-order exhaustive algorithm to support the search of epistasis interactions of any order and discusses multiple SIMD implementations of the different functions that compose the search using Intel AVX Intrinsics. Results using the GCC and the Intel compiler show that the 512-bit explicit vector implementation proposed here performs the best out of all of the other implementations evaluated. The proposed 512-bit vectorization accelerates the original implementation of the algorithm by an average factor of 7 and 12, for GCC and the Intel Compiler, respectively, in the scenarios tested.

Fiuncho: a program for any-order epistasis detection in CPU clusters

“…MPI multiprocessing and multithreading are used for the implementation. • Data and bit-level parallelism: each task exploits the Vector Processing Units (VPUs) by using the Single Instruction Multiple Data (SIMD) algorithm proposed in [7], including the explicit vector implementations for the x86_64 CPU architecture of the three stages of the association test presented in Section 3. Furthermore, this algorithm uses 64-bit word arrays to represent each of the rows of the genotype tables, and as a consequence of that, each intersection operation (bitwise AND) works with 64 samples at once.…”

“…BitEpi implements a 2, 3 and 4-locus epistasis search that also uses multithreading to speed up the search. Furthermore, for the x86_64 CPU architecture, there are some publications that discuss AVX vector implementations of the epistasis search [6,7].…”

“…Integer and floating-point vector operations are part of the vector functions implementing the association test as presented in [7]. The function combine implements the construction of a genotype table from two previous input genotype tables, and the function combine_and_popcount Fiuncho Algorithm 1 Parallel_search: Tests a subset of variant combinations for association with the trait under study.…”

“…Furthermore, this processor reduces its turbo frequencies if vector floating-point arithmetic is used. To mitigate the impact of this frequency reduction, the SIMD algorithm previously referenced segments the operations into blocks so that each block can operate at a different frequency [7], and the same technique is applied to Algorithm 1.…”