A Short Historical Survey of Functional Hardware Languages

Chen, Gang

doi:10.5402/2012/271836

Cited by 8 publications

(2 citation statements)

References 51 publications

(53 reference statements)

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“…Several functional HDLs have been created over the decades; their high diversity is due to the complexity of hardware design. A historical survey that discusses these languages can be found in [22]. The language that we chose for our approach is Lava [23], which consists of a simple HDL embedded in the functional programming language Haskell.…”

Section: The Proposed Approachmentioning

confidence: 99%

Formal verification of pipelined cryptographic circuits: A functional approach

Bitat

Merniz

2021

IJCAI

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Cryptographic circuits are essential in systems where security is the main criteria. Therefore, it is crucial to ensure the correctness of not only the cryptographic algorithms, but also their hardware implementations. Formal methods, unlike the other validation techniques, guarantee the absence of errors.The problem is that designers still use conventional imperative Hardware Description Languages (HDLs), which are poorly suited for formal verification. This paper presents an automatic verification methodology for the pipelined cryptographic circuits using formal methods. It consists of using the functional HDL Lava to describe and verify the equivalence between the behavioural specification and structural implementation of a circuit. To the best of our knowledge, we are the first to use this functional HDL for that purpose. To show the features of the proposed approach, it was applied to verify the pipelined implementation of the cryptographic circuit AES (Advanced Encryption Standard).Povzetek: Za namene preverjanja formalne pravilnosti delovanja vezij je opisan funkcionalni pristop.

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Section: The Proposed Approachmentioning

confidence: 99%

Formal verification of pipelined cryptographic circuits: A functional approach

Bitat

Merniz

2021

IJCAI

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“…To improve the programmer experience by addressing limitations in algorithmic expressibility, and thereby to bridge the gap between software and hardware programming (which promotes the widespread adoption of FPGAs), a number of projects strive to develop language frameworks that raise the level of abstraction from HDLs (two comprehensive reviews are available in [33], [34]). Most of these frameworks opt to achieve one or both of the following two objectives: (i) automate code synthesizability (functional verification, netlist generation, translation and synthesis, mapping to FPGA resource requirements, place-and-route, timing analysis, bitstream generation) into something that resembles the compilation process in software languages; (ii) formalise ways of mapping a high-level algorithm (behavioural description) to some lowlevel description (register-transfer level or digital circuit).…”

Section: A Motivationmentioning

confidence: 99%

On Hardware Programmable Network Dynamics With a Chemistry-Inspired Abstraction

Monti

Sifalakis

Tschudin

et al. 2017

IEEE/ACM Trans. Networking

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Chemical algorithms are statistical algorithms described and represented as chemical reaction networks. They are particularly attractive for traffic shaping and general control of network dynamics; they are analytically tractable, they reinforce a strict state-to-dynamics relationship, they have configurable stability properties, and they are directly implemented in statespace using a high-level (graphical) representation. In this paper, we present a direct implementation of chemical algorithms on FPGA hardware. Besides substantially improving performance, we have achieved hardware-level programmability and re-configurability of these algorithms at runtime (not interrupting servicing) and in realtime (with sub-second latency). This opens an interesting perspective for expanding the currently limited scope of software defined networking and network virtualisation solutions, to include programmable control of network dynamics.

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Hardware Specification with C $$\varvec{\lambda }$$ aSH

Kuper

2015

Central European Functional Programming School

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A Short Historical Survey of Functional Hardware Languages

Cited by 8 publications

References 51 publications

Formal verification of pipelined cryptographic circuits: A functional approach

Formal verification of pipelined cryptographic circuits: A functional approach

On Hardware Programmable Network Dynamics With a Chemistry-Inspired Abstraction

Hardware Specification with C $$\varvec{\lambda }$$ aSH

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