A sample preparation methodology to reduce sample edge unevenness and improve efficiency in delayering the 20-nm node IC chips

Feng, Huanhuan; Tan, Puay Siew; Yap, H. H.; Low, G.R.; He, Rujie; Zhao, Yuzhe; Liu, B.; Dawood, M. K.; Zhu, Jie; Huang, Yuanyuan; Wang, D. D.; Tan, H.; Lam, Jeffrey; H., Z.

doi:10.1109/ipfa.2015.7224432

Cited by 5 publications

(4 citation statements)

References 3 publications

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“…Scanning electron microscopy (SEM) images, alternated with delayering, reveal the device's physical layout at each level, including vias and metal layers that form the physical structure of the IC. The practices related to this type of analysis are highly complex and often require significant specialized experience to yield meaningful results [68][69][70].…”

Section: Traditional Hardware Security Strategiesmentioning

confidence: 99%

5G hardware supply chain security through physical measurements

Scott¹

2022

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Section: Traditional Hardware Security Strategiesmentioning

confidence: 99%

5G hardware supply chain security through physical measurements

Scott¹

2022

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“…Figure 1 shows a schematic plot of semiconductor fabrication for wafers that can be classified into a front-end-of-line (FEOL) step, indicated by the white regions with interior brown segments, and back-end-of-line (BEOL) steps, indicated by the purple and yellow regions with interior brown segments [9]. These are the production phase steps.…”

Section: Introductionmentioning

confidence: 99%

“…As a result of the barrier metal's good capacity for adhesion to Cu seed crystals, it also ensures the filling of the grooves of the BEOL phase with the deposited copper [17]. A schematic plot of semiconductor fabrication for wafers that can be classified as including front-end-of-line (FEOL) production steps, in white, and back-end-of-line (BEOL) steps, indicated by the purple and yellow regions [9].…”

Section: Introductionmentioning

confidence: 99%

Polymer Nanoparticles Applied in the CMP (Chemical Mechanical Polishing) Process of Chip Wafers for Defect Improvement and Polishing Removal Rate Response

Chiu

Huang

2023

Polymers

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Chemical mechanical planarization (CMP) is a wafer-surface-polishing planarization technique based on a wet procedure that combines chemical and mechanical forces to fully flatten materials for semiconductors to be mounted on the wafer surface. The achievement of devices of a small nano-size with few defects and good wafer yields is essential in enabling IC chip manufacturers to enhance their profits and become more competitive. The CMP process is applied to produce many IC generations of nanometer node, or those of even narrower line widths, for a better performance and manufacturing feasibility. Slurry is a necessary supply for CMP. The most critical component in slurry is an abrasive particle which affects the removal rates, uniformity, defects, and removal selectivity for the materials on the wafer surface. The polishing abrasive is the source of mechanical force. Conventional CMP abrasives consist of colloidal silica, fume silica or other inorganic polishing particles in the slurries. We were the first to systematically study nanoparticles of the polymer type applied in CMP, and to compare traditional inorganic and polymer nanoparticles in terms of polishing performance. In particular, the polymer nanoparticle size, shape, solid content dosing ratio, and molecular types were examined. The polishing performance was measured for the polishing removal rates, total defect counts, and uniformity. We found that the polymer nanoparticles significantly improved the total defect counts and uniformity, although the removal rates were lower than the rates obtained using inorganic nanoparticles. However, the lower removal rates of the polymer nanoparticles are acceptable due to the thinner film materials used for smaller IC device nodes, which may be below 10 nm. We also found that the physical properties of polymer nanoparticles, in terms of their size, shape, and different types of copolymer molecules, cause differences in the polishing performance. Meanwhile, we used statistical analysis software to analyze the data on the polishing removal rates and defect counts. This method helps to determine the most suitable polymer nanoparticle for use as a slurry abrasive, and improves the reliability trends for defect counts.

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“…However, if the sample comes with the accidental damage or the naturally generated edge rounding during the delayering, the problems have to be fixed to restore the sample to the former condition before the polishing is continued to the target layer. The common problems encountered in the delayering include sample cracks, polishing scratches, and surface unevenness [2][3][4][5][6]. The sample cracks refer to the sample die breaking into pieces due to chipping, dropping or crushing, which would pose great challenges to the following polishing if the crack lines extend ASTESJ ISSN: 2415-6698 across the defect area.…”

Section: Introductionmentioning

confidence: 99%

Advanced Physical Failure Analysis Techniques for Rescuing Damaged Samples with Cracks, Scratches, or Unevenness in Delayering

Pan¹,

Tan²,

Ting³

et al. 2021

Adv. sci. technol. eng. syst. j.

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This paper is an extended version of work published in IPFA 2020. In the previous paper, advanced physical failure analysis (PFA) techniques for rescuing damaged samples with cracks, scratches, or unevenness in delayering are introduced. In the present work, the techniques will be further exploited and summarized for the potential applications in general devices. The three typical rescue cases will be fully discussed through comprehensive analysis on the failure mechanism and the rescuing process. Compared to the conventional PFA techniques that normally require back-up samples, the novel rescue techniques offer more alternative solutions for coping with sample damage problems in delayering without starting over with a new sample that would waste machine time and human resources. These new PFA techniques involve only basic failure analysis (FA) skills that could be easily manipulated and FA equipment that is commonly available in FA labs, and would extend the scope and capability of the tradition PFA to help the FA engineers deliver FA results with high quality and high success rate in the daily work, especially for handling "one of a kind" devices.

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A sample preparation methodology to reduce sample edge unevenness and improve efficiency in delayering the 20-nm node IC chips

Cited by 5 publications

References 3 publications

5G hardware supply chain security through physical measurements

5G hardware supply chain security through physical measurements

Polymer Nanoparticles Applied in the CMP (Chemical Mechanical Polishing) Process of Chip Wafers for Defect Improvement and Polishing Removal Rate Response

Advanced Physical Failure Analysis Techniques for Rescuing Damaged Samples with Cracks, Scratches, or Unevenness in Delayering

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