2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) 2018
DOI: 10.1109/dft.2018.8602971
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A Runtime Fault-Tolerant Routing Scheme for Partially Connected 3D Networks-on-Chip

A. Coelho
1
,
Amir Charif
2
,
Nacer-Eddine Zergainoh
3
et al.
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