A Review on Low Power Sram

Abstract

Abstract-The main issue in VLSI design are optimizing speed, scaling in silicon technology and increased packing density. These issues account for increased power dissipation in SoC (System on Chips) making them unsuitable for portable operations. Since SRAM consist of almost 60% of VLSI circuits, hence, it is needed that a low power SRAM design to maximize the run time with minimum requirements on size, battery life and weight allocated to batteries. In this paper the basic operation of SRAM along with techniques to reduce total power dissipation are discussed.