A review on Buffer Chips and growing Memory Bandwidths

Abstract

The rapid development of CPU technology and the increase in the number of functionalities involved in a chip demand improvement in the memory bandwidth to feed data to the growing pipeline technology. Slower memory bandwidth would result in reduced CPU utilization and make the processor stay idle. The rise in memory bandwidth comes with the challenge of maintaining the signal integrity and affects the number of DIMM (Dual Inline Memory Module) slots in a channel and reduces memory capacity. The challenge of maintaining the signal integrity with the increase in the frequency of operation is solved by introducing additional interfacing chips between the memory controller or CPU and memory module. Buffer chips are used in servers to maintain signal integrity and meet the timing parameters for the commands and addresses sent to the memory modules. Buffer chips help in increasing the frequency of operations as well as the number of memory modules connected. Register Clock Driver (RCD) is one buffer chip used between the memory controller and DRAM that supports the bandwidth and capacity needed in the next-generation data centres. This paper aims at reviewing importance of buffer chips and their application in modern day data centres.