2016
DOI: 10.1016/j.sse.2015.11.007
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A review of electrical characterization techniques for ultrathin FDSOI materials and devices

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Cited by 48 publications
(23 citation statements)
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“…Notably, in the positive V BG regime, a hump associated with a rapid enhancement of I DS appears, independent of V DS . This strongly implies the presence of two different conduction mechanisms or conducting paths, similar to double-gate Si and junctionless Si transistors 36,37 .…”
Section: Resultsmentioning
confidence: 99%
“…Notably, in the positive V BG regime, a hump associated with a rapid enhancement of I DS appears, independent of V DS . This strongly implies the presence of two different conduction mechanisms or conducting paths, similar to double-gate Si and junctionless Si transistors 36,37 .…”
Section: Resultsmentioning
confidence: 99%
“…However an implementation of the SHG for SOI characterization would be very advantageous since the methods typically used to extract electrical properties of SOI wafers (i.e. interface trap densities) necessitate either full fabrication of test devices (which is not time and cost-effective) or placing metallic probes on the film (highly destructive especially for ultra-thin films) (26). Within this context, the non-destructive SHG, sensitive to interface electric fields has a great potential.…”
Section: Shg For Multiple Dielectric-semiconductor Interfacesmentioning
confidence: 99%
“…[124][125][126][127][128][129][130][131]. The interfacial defect densities modified by ion implantation have been studied combining IPE and ac conductance spectroscopy methods on nitrogen implanted SiC/SiO 2 interfaces [132].…”
Section: Photoinjectionmentioning
confidence: 99%