A review and design of the on-chip rectifiers for RF energy harvesting

Abstract

This paper presents an overview of the CMOS onchip rectifiers for RF energy harvesting in the RFID, internet of things, or wearable device applications. The pros and cons of different RF to DC rectifier topologies are investigated, compared, and summarized. All the topologies are designed and optimized in a 65nm CMOS process, with the input power range from -10dBm to 4dBm and the load resistor range from 10kΩ to 1MΩ. The simulated results show that the cross-connected (CC) topology exhibits the highest achievable power conversion efficiency up to 65% (rectifier only), while the CC topology with the threshold voltage cancellation technique and the MOS diode topology achieve 46.7% and 51%, respectively.

CMOS rectifier design for RFID chip with high sensitivity at low input power to be combined with an ultrasmall antenna

“…Although this topology suffers from some loss caused by the leakage current, but in terms of overall performance, this topology is considered the best in terms of PCE if the input power is low. Because of its higher sensitivity compared with others, this topology is widely used in previously reported works …”

“…State‐of‐the‐art CMOS rectifiers for 915 MHz RFID show an output load range from 10 kΩ to 5.45 MΩ. The DC output power ranges from 0.2 to 50 μW whereas the reference voltage are between 0.53 and 2.75 V . For 5.8 GHz, only the work of Radiom et al can be referred to with an output load of 5.45 MΩ.…”

“…State-of-the-art CMOS rectifiers for 915 MHz RFID show an output load range from 10 kΩ to 5.45 MΩ. The DC output power ranges from 0.2 to 50 μW whereas the reference voltage are between 0.53 and 2.75 V. 12,15,16,19,22,31,34,39,44,47,50 work is set at 1 MΩ (1 μW, 1 V) for 915 MHz and 5.45 MΩ (0.594 μW, 1.8 V) for 5.8 GHz for a fair performance comparison with the circuits from the references. 17,22,34,47 To optimize the sensitivity and PCE of each topology, the large-signal S-parameter simulation (LSSP) and harmonic balance simulation (HB) have been applied.…”

“…5. Calculate the PCE from Equations (14) and (15) by determining the load resistance of the circuit.…”

“…Output voltage and power conversion efficiency (PCE) vs input power of a two-stage Dickson multiplier with different efficiency improvement schemes at 5.8 GHz and with a 5.45 MΩ load PCE ¼ P out;dc P in;rf (15) 6. Find the maximum sensitivity obtained by optimizing each rectifier circuit and by adjusting the number of stages, device size, capacitance of the rectifier, and load.…”