A Resource Manager for Dynamically Reconfigurable FPGA-Based Embedded Systems

Cervero, T.; Dondo, Julio; Gómez, Armando Zuluaga; Pena, Xerach; López, S.; Rincón, Fernando; Sarmiento, Roberto; López, Juan Carlos

doi:10.1109/dsd.2013.75

Cited by 6 publications

(5 citation statements)

References 15 publications

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“…In [30], the proposed approach involves a Process-based Reconfigurable SystemC Module (PRM) for design space exploration speedup. e PRM uses Unix calls for process [31] propose a layered dynamic resource manager that provides a set of services to perform efficient scheduling and control of the sequence and processes related to the partial reconfiguration of FPGAs. Furthermore, a SystemC-based simulation framework has been defined by introducing the concept of Dynamic Module.…”

Section: Related Workmentioning

confidence: 99%

A Service-Oriented Component-Based Framework for Dynamic Reconfiguration Modeling Targeting SystemC/TLM

Allem

Bourennane

Khelfaoui

2021

International Journal of Reconfigurable Computing

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To deal with the complex design issues of Dynamically Reconfigurable Systems-on-Chip (DRSoCs), it is extremely relevant to raise the abstraction level in which models are expressed. A high abstraction level allows great flexibility and reusability while bypassing low-level implementation details. In this context, model-driven engineering (MDE) provides support to build and transform precise and structured models for a particular purpose at different levels of abstraction. Indeed, high-level models are successively refined to low-level models until reaching the executable ones. Thus, this paper presents an MDE-based framework for DRSoCs design enabling the transformation of UML/MARTE specifications to SystemC/TLM implementation. To achieve a high degree of expressiveness for modeling dynamic reconfiguration, we use a suitable software engineering approach based on service-oriented component architecture. Since MARTE does not cover the common features of dynamic reconfiguration domain and service orientation concepts, new stereotypes are created by refinement to add missing capabilities to the profile. Likewise, SystemC does not provide native support for dynamic reconfiguration, thus leading us to adopt a design pattern based solution for DRSoCs implementation in compliance with standards. The proposed framework is validated through a reconfigurable active 3-way crossover case study in which we demonstrate the practicability of the approach by gradual model transformations with reduced implementation effort and significant design productivity gain.

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Section: Related Workmentioning

confidence: 99%

A Service-Oriented Component-Based Framework for Dynamic Reconfiguration Modeling Targeting SystemC/TLM

Allem

Bourennane

Khelfaoui

2021

International Journal of Reconfigurable Computing

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“…4. A quadtree (as proposed in [12]) or a 2D mesh (as proposed in [13]) can react to changing runtime requirements and provide RRs of flexible size. A proper scheduling algorithm minimizes fragmented free space and therefore offers maximum flexibility for placing new RMs during runtime.…”

Section: Adaptive Rr Sizementioning

confidence: 99%

Resource-efficient dynamic partial reconfiguration on FPGAs for space instruments

Dorflinger

Fiethe

Michalik

et al. 2017

2017 NASA/ESA Conference on Adaptive Hardware and Systems (AHS)

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Field-Programmable Gate Arrays (FPGAs) provide highly flexible platforms to implement sophisticated data processing for scientific space instruments. The dynamic partial reconfiguration (DPR) capability of FPGAs allows it to schedule HW tasks. While this feature adds another dimension of processing power that can be exploited without significantly increasing system complexity and power consumption, there are still several challenges for an efficient DPR use. State-of-the-art concepts concentrate either on resource-efficient implementations at design time or flexible HW task scheduling at runtime. In this paper we propose a balanced algorithm that considers both optimization goals and is well suited for resource-limited space applications.

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“…Dynamic resource managers are also common elements in reconfigurable computing, as it can be seen in [18], where the authors propose a smart reconfiguration methodology targeting application performance. The ARTICo 3 approach, on the other hand, focuses its optimization capabilities not only on execution performance but also on energy efficiency by taking into account the aforementioned elements: modeling and profiling.…”

Section: Related Workmentioning

confidence: 99%

Execution modeling in self-aware FPGA-based architectures for efficient resource management

Rodríguez

Valverde

Castanares

et al. 2015

2015 10th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC)

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Abstract-SRAM-basedFPGAs have significantly improved their performance and size with the use of newer and ultradeep-submicron technologies, even though power consumption, together with a time-consuming initial configuration process, are still major concerns when targeting energy-efficient solutions. System self-awareness enables the use of strategies to enhance system performance and power optimization taking into account run-time metrics. This is of particular importance when dealing with reconfigurable systems that may make use of such information for efficient resource management, such as in the case of the ARTICo 3 architecture, which fosters dynamic execution of kernels formed by multiple blocks of threads allocated in a variable number of hardware accelerators, combined with module redundancy for fault tolerance and other dependability enhancements, e.g. side-channel-attack protection.In this paper, a model for efficient dynamic resource management focused on both power consumption and execution times in the ARTICo 3 architecture is proposed. The approach enables the characterization of kernel execution by using the model, providing additional decision criteria based on energy efficiency, so that resource allocation and scheduling policies may adapt to changing conditions. Two different platforms have been used to validate the proposal and show the generalization of the model: a high-performance wireless sensor node based on a Spartan-6 and a standard off-the-shelf development board based on a Kintex-7.Index Terms-Self-awareness, dynamic and partial reconfiguration, dynamic resource management, FPGAs.

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A Resource Manager for Dynamically Reconfigurable FPGA-Based Embedded Systems

Cited by 6 publications

References 15 publications

A Service-Oriented Component-Based Framework for Dynamic Reconfiguration Modeling Targeting SystemC/TLM

A Service-Oriented Component-Based Framework for Dynamic Reconfiguration Modeling Targeting SystemC/TLM

Resource-efficient dynamic partial reconfiguration on FPGAs for space instruments

Execution modeling in self-aware FPGA-based architectures for efficient resource management

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