A reliable approach to charge-pumping measurements in MOS transistors

Groeseneken, G.; Maes, H.E.; Beltran, N.; Keersmaecker, R. F. De

doi:10.1109/t-ed.1984.21472

Cited by 1,305 publications

(593 citation statements)

References 18 publications

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“…Charge-pumping method 43 is more sensitive to the surface state, so it is employed to find the charges trapped on or close to the interface between SiO 2 and the trap layer 44,45 , but it is difficult to detect the negative charges locating deeply in the HfO 2 layer.…”

Section: Discussionmentioning

confidence: 99%

In situ electron holography study of charge distribution in high-κ charge-trapping memory

Yao

Huo

et al. 2013

Nat Commun

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Charge-trapping memory with high-k insulator films is a candidate for future memory devices. Many efforts with different indirect methods have been made to confirm the trapping position of the charges, but the reported results in the literatures are contrary, from the bottom to the top of the trapping layers. Here we characterize the local charge distribution in the high-k dielectric stacks under different bias with in situ electron holography. The retrieved phase change induced by external bias strength is visualized with high spatial resolution and the negative charges aggregated on the interface between Al 2 O 3 block layer and HfO 2 trapping layer are confirmed. Moreover, the positive charges are discovered near the interface between HfO 2 and SiO 2 films, which may have an impact on the performance of the chargetrapping memory but were neglected in previous models and theory.

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Section: Discussionmentioning

confidence: 99%

In situ electron holography study of charge distribution in high-κ charge-trapping memory

Yao

Huo

et al. 2013

Nat Commun

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“…In [2] CV spectroscopy is used to determine the number of fast interface states (IS) in MOS devices and it is found that the IS density is much higher than previously thought. The extracted peak IS density is about 5-10 11 /(eVcm 2 ) for standard thermal oxides, which is more than one order of magnitude larger than typically assumed up to now [3]. This implies that the prevailing picture of the Si/Si0 2 interface is wrong and the interface quality is much lower than expected.…”

Section: Introductionmentioning

confidence: 74%

On The Modeling Of CV Data For State-Of-The-Art CMOS Technologies: Do We Need To Include Fast Interface States?

Jungemann

Meinerzhagen

1998

Simulation of Semiconductor Processes and Devices 1998

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In recent publications on MOS devices a fast interface state density has been assumed for standard thermal oxides, which is more than ten times higher than previously expected [2,7], In contrast to those results our investigations of standard MOS devices fabricated by three different manufactures do not yield such a high interface state density. Therefore some of the conclusions drawn in [2,7] appear doubtful. Our results show that fast interface states can still be neglected for modeling state-of-the-art CMOS technologies and previously extracted mobility data are still valid although fast interface states have been ignored.

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“…4. This is due to decrease in the emission current from electrons in non-steady-state interface traps in the upper part of the energy band gap moving to the conduction band under the influence of the rapidly rising gate voltage [13].…”

Section: Resultsmentioning

confidence: 99%

“…Charge pumping (CP) measurements [13] were performed using a gate pulse of fixed amplitude (-3 V) and a variable base level, V BASE , with a pulse frequency of 66~250 kHz, in the temperature range from RT to 91 K. The gate pulse configuration during the CP measurements is shown in Fig. 3.…”

Section: Technology Evolution For Silicon Nano-electronicsmentioning

confidence: 99%

Capture/Emission Processes of Carriers in Heterointerface Traps Observed in the Transient Charge-Pumping Characteristics of SiGe/Si-Hetero-Channel pMOSFETs

Tsuchiya

Yoshida

Sakuraba

et al. 2011

KEM

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Abstract. Transient phenomena related to carrier capture/emission processes in interface traps were observed in the the charge pumping (CP) characteristics of SiGe/Si hetero-channel pMOSFETs, i.e., the CP characteristics were found to depend on the on/off time of the gate pulse. From these observations, time constants for the processes both in SiGe/Si heterointerface traps and in gate-oxide interface traps were derived. The time constant is considered to depend on the energy level of the interface traps that are present over a wide range within the energy gap. Therefore, these phenomena provide an interesting way of evaluating the discrete energy levels of interface traps in nanometer-scale devices containing only a few traps.

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A reliable approach to charge-pumping measurements in MOS transistors

Cited by 1,305 publications

References 18 publications

In situ electron holography study of charge distribution in high-κ charge-trapping memory

In situ electron holography study of charge distribution in high-κ charge-trapping memory

On The Modeling Of CV Data For State-Of-The-Art CMOS Technologies: Do We Need To Include Fast Interface States?

Capture/Emission Processes of Carriers in Heterointerface Traps Observed in the Transient Charge-Pumping Characteristics of SiGe/Si-Hetero-Channel pMOSFETs

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