A Reduced Complexity Algorithm for Minimizing N-Detect Tests

2012

J Electron Test

We minimize a given test set without loss of diagnostic resolution in full-response fault dictionary. An integer linear program (ILP), formulated from fault simulation data, provides ultimate reduction of test vectors while preserving fault coverage and pairwise distinguishability of faults. The complexity of the ILP is made manageable by two innovations. First, we define a generalized independence relation between pairs of faults to reduce the number of fault pairs that need to be distinguished. This significantly reduces the number of ILP constraints. Second, we propose a two-phase ILP approach. In the first phase, using an existing procedure, we select a minimal detection test set. In the second phase, additional tests are selected for the undiagnosed faults using a newly formulated diagnostic ILP. The overall minimized test set may be only slightly longer than a one-step ILP optimization, but has advantages of reducing the minimization problem complexity and the test time required by the minimized tests. Benchmark results show potential for significantly smaller diagnostic test sets.

Section: Resultsmentioning

confidence: 99%

“…Tool developers using these algorithms should devise appropriate heuristics. One possibility is to use a relaxed ILP in which a lower-complexity linear program (LP) provides an approximate solution [10,15]. The second issue is that of the ability to diagnose real defects that may not conform to the modeled faults.…”

Section: Resultsmentioning

confidence: 99%

Diagnostic Test Set Minimization and Full-Response Fault Dictionary

Shukoor

2012

J Electron Test

“…In such a case, the problem can be solved by the previously proposed recursive-LP algorithm [4], which guarantees a solution. We believe that, whenever a solution is possible, the hybrid LP-ILP will be faster than the recursive-LP.…”

Section: Hybrid Lp-ilp Methodsmentioning

confidence: 99%

“…The worst-case complexity of LP is polynomial-time while that of ILP is exponential. We have devised an "hybrid LP-ILP" method, outlined in Section 5, which is a variation of the published recursive-LP method of test minimization [4].…”

Section: Combined Ilp Modelmentioning

confidence: 99%

N-Model Tests for VLSI Circuits

Yogi

2008 40th Southeastern Symposium on System Theory (SSST)

2008

We define N-model tests that target detection of faults belonging to N specified fault models. We provide a method for deriving minimal tests using integer linear programming (ILP) without reducing the individual fault model coverage. Any test sequences, deterministic, random, functional, N-detect, etc., can be minimized for the given set of fault models. Stuck-at, transition, and pseudo stuck-at I DDQ faults are used as illustrations. We generate tests using Mentor Graphics FastScan ATPG tool employing a single fault model at a time. A minimized test set for the three fault models is then obtained by solving the proposed combined ILP problem. For s5378 benchmark circuit we achieved about 50% reduction in the number of vectors and 10% reduction in the I DDQ current measurements compared to the originally generated tests. We also propose a reduced complexity ILP approximation.

“…But the number of test patterns also grows with increasing N , which leads to longer test time and/or higher cost. Methods have been proposed [8,9,14] for compaction of N -detect vector set. These require computational effort.…”

Section: Background and Motivationmentioning

confidence: 99%

Reduced complexity test generation algorithms for transition fault diagnosis

2011 IEEE 29th International Conference on Computer Design (ICCD)

2011

Abstract-To distinguish between a pair of transition faults, we need to find a test vector pair (LOC or LOS type) that produces different output responses for the two faults. By adding a few logic gates and one modeling flip-flop to the circuit under test (CUT), we create a diagnostic ATPG model usable by a conventional single stuck-at fault test pattern generator. Given a transition fault pair, this ATPG model either finds a distinguishing test or proves the faults to be equivalent. An efficient diagnostic fault simulator is devised to find undistinguishable fault pairs from a fault list by a test vector set. The number of fault pairs that needs to be targeted by the ATPG is greatly reduced after diagnostic fault simulation. We use a previously proposed diagnostic coverage (DC) metric to determine the distinguishability (diagnosability) of a test vector set. Experimental results show improved DC for benchmark circuits after applying the proposed diagnostic ATPG algorithms.