A Reconfigurable Baseband Platform Based on an Asynchronous Network-on-Chip

High-Throughput Partially Parallel Inter-Chip Link Architecture for Asynchronous Multi-Chip NoCs

“…However, the throughput is still smaller than that (5 Gbps) of the asynchronous on-chip communication link based on the four-phase protocol [2] and that (17 Gbps) based on two-phase protocol that has half communication steps of the four-phase one [3]. In addition, the delay overhead of the data-retransmission scheme is not considered, so that the throughput would be even lower.…”

“…In [13], the asynchronous burst-mode serial link reaches to 3 Gbps using 4 I/Os by eliminating the per-bit handshake, which may cause data-transmission errors. However, the throughput is still lower than that of the on-chip links [2], [3] and it is getting lower if a dataretransmission overhead is considered.…”

“…Each NoC includes processing cores with asynchronous on-chip network, which consists of switching routers and on-chip data-transmission links [15], [16] designed using asynchronous circuits. Each processing core transmits/receives packets, which basically include header, body, and tail flits [2], [3]. The router decides a packet route by processing the header flit and keeps it until the tail flit is processed.…”

Open-Fault Resilient Multiple-Valued Codes for Reliable Asynchronous Global Communication Links

“…The global asynchronous communication has been recently used in several applications: Network-on-Chips (NoC) [3], [4], Low-Density Parity-Check (LDPC) decoders [5], [6], commercialized field-programmable gate ar- rays (FPGA) [7] Ethernet routing chips [8], and digital signal processing (DSP) chips [9]. Some asynchronous communication links have been proposed for high performance systems [10]- [12] as well as reliable systems, where asynchronous communication links are robust against various faults, such as transient and permanent faults [13]- [17].…”

Highly Reliable Multiple-Valued One-Phase Signalling for an Asynchronous On-Chip Communication Link

“…Globally Asynchronous Locally Synchronous (GALS) [1], [2] Network-on-Chip (NoC) architecture [3] is one of the useful approaches for wide-bandwidth demands in large-scaled System-on-Chips (SoCs), and provides that multiple communications are simultaneously done over asynchronous routers and links between processing cores which are operated by different clock frequencies.…”