1993 Computer Architectures for Machine Perception
DOI: 10.1109/camp.1993.622475
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A reconfigurable and flexible parallel 3D vision system for a mobile robot

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Cited by 13 publications
(2 citation statements)
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“…Perhaps the most common computer vision algorithm implemented using FPGAs is that of stereo disparity estimation [6,28,19,30,8,13]. The PARTS reconfigurable computer [28] consists of a 4 × 4 array of mesh-connected FPGAs with a maximum total number of about 35,000 4-input LUTs.…”
Section: Previous Workmentioning
confidence: 99%
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“…Perhaps the most common computer vision algorithm implemented using FPGAs is that of stereo disparity estimation [6,28,19,30,8,13]. The PARTS reconfigurable computer [28] consists of a 4 × 4 array of mesh-connected FPGAs with a maximum total number of about 35,000 4-input LUTs.…”
Section: Previous Workmentioning
confidence: 99%
“…In Faugeras et al [8], a 4 × 4 matrix of small FPGAs is used to perform the crosscorrelation of two 256 × 256 images in 140 ms. In Hou et al [13], a combination of FPGA and Digital Signal Processors (DSPs) is used to perform edge-based stereo vision. Their approach uses FPGAs to perform low level tasks like edge detection and uses DSPs for higher level integration tasks.…”
Section: Previous Workmentioning
confidence: 99%