A reconfigurable 60GHz subsampling receiver architecture with embedded channel filtering

Grave, Baptiste; Frappé, Antoine

doi:10.1109/iscas.2012.6271476

Cited by 2 publications

(1 citation statement)

References 13 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Once the phase steering practical circuit impediments have been identified through the modifications above, automated tuning and calibration techniques based on sub-sampling architectures, such as those reported in [76], [121] and [122], can be developed. The practically proven architecture in [123] can be ported to initially tune the center frequency of the LO-elements' oscillators.…”

Section: Future Workmentioning

confidence: 99%

Frequency Multiplication Techniques for Sub-Harmonic Injection Locking of LC Oscillators and its Application to Phased-Array Architectures

Soliman¹

View full text Add to dashboard Cite

A frequency multiplication and phase steering technique that utilizes the injection locking phenomena of LC local oscillators (LO) is reported. The potential application of this technique to LO-path based phase-shifting in RF/millimeter-wave integrated phased-array architecture is proposed. Advantages and disadvantages of the proposed technique are discussed in reference to those of the recently reported architectures in the literature. A high-order harmonic synthesis approach is introduced at the core of the proposed frequency multiplication technique for which a mathematical formulation is provided to highlight the underlying principles and trade-offs. Architectural variations on the high-order harmonic synthesis approach are also introduced and contrasted. The proposed multiplication and phase steering techniques have been investigated and prototyped in a main stream 130-nm CMOS process. Simulation and measurement results of the prototype are provided to substantiate the proposed techniques. Measurement results include output phase noise performance of-115 and-107.17 dBc/Hz, maximum phase shift errors of 2.35 • and 2.1 • after calibration, extracted peak-to-null ratios of > 28 dB and current consumptions of 26.8 mA and 30.3 mA at 18.31 GHz and 21.51 GHz, respectively. ii He that spared not his own Son, but delivered him up for us all, how shall he not with him also freely give us all things? (Romans 8:32) iii Acknowledgement I would like to thank my friends and colleagues who contributed to the completion of this work. First and for most, I wish to thank Professor Ralph Mason not only for giving me the opportunity to pursue my academic studies in a field that I have always been interested in, but also for his patience, guidance and support throughout the entire research program. Ralph, thanks for quietly teaching me by example how someone can be very hard working, extremely efficient and organized while maintaining a good balance and enjoying. I would like to thank the faculty members, staff, fellow graduate students and alumni in the Department of Electronics who have always been there to listen, help and give advice. I wish to thank Professor Calvin Plett for giving me the opportunity to become the graduate RFIC course TA. It certainly was a great learning experience which provided me with the necessary research foundation for a field that I always dreamed to be in. I acknowledge the hardware and computer networking support of Mr. Nagui Mikhail and Mr. Scott Bruce. I am grateful to the enormous help and support of our amazing departmental administrator, Ms. Blazenka Power, and our wonderful graduate assistant, Ms. Anna Lee. I also wish to thank my fellow graduate

show abstract