A real time P*64/MPEG video encoder chip

Rao, Supreeth Krishna; Hatamian, M.; Uyttendaele, Matt; Narayan, Sreenath; O'Neill, J.; Uvieghara, G.A.

doi:10.1109/isscc.1993.280096

Cited by 30 publications

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“…In the 1990s, there was rapid development of DSP circuits for video encoding/compression, as an alternative to general-purpose image processing. The earliest example of a dedicated MPEG encoder with motion estimation was presented in 1993 [18]. Such video directed circuits were at the forefront of DSP complexity, with designs increasing in size from one million to several tens of millions of transistors by the end of the decade.…”

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50 years of signal processing at ISSCC

Thon¹

2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.

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The FieldThe technical field of Signal Processing encompasses all forms of sampled-data manipulation where the data (or signal) has a physical origin, or destination. In the context of ISSCC, signal processing refers to solid-state circuits designed to process samples that may be in digital or analog format. Physical origins or destinations include mechanical (audio) and electromagnetic waves (either in conductors or in free space), such as for telephony, radio, imaging, or optical transmission.The restriction to sampled data is an important one, and distinguishes signal processing from purely continous-time processing, as is performed by traditional analog circuits. While discrete time (or space) is of the essence, what characterizes signal processing at ISSCC is also the continuous real-time nature of the processing, as opposed to the matched process of data collection followed by off-line processing. The Early YearsDefinitions aside, signal processing has a long and distinguished history at the Conference. However, the pace of development has definitely quickened in the last 25 years. An early example of sampled-data (analog) processing was presented by Franks in 1960 [1], in a paper describing a sampled-data bandpass filtering process based on junction-diode switching.Development of signal-processing circuits began to accelerate in the 1970s. Significant milestones in analog and digital sampled-data-processing are exemplified by the papers on CCD circuits [2], and the first integrated digital filter [3]. The sampledanalog CCD technique was used in what was perhaps the first dedicated implementation of the Discrete Fourier Transform [4]. The most significant advantage of CCD and switched-capacitor [5] circuits was that no analog-todigital conversion was needed for the signals. However, the increased effort required to obtain a robust design of ever-morecomplex analog sampled-data circuits resulted in a market opportunity for digital solutions.Simultaneous progress in the area of A/D and D/A data-conversion circuits permitted the use of highly-integrated digital signal-processing functions in an economical manner. In particular, the early 1980s saw the first examples of programmable DSP circuits [6,7,8]. The VLSI era also introduced the first examples of complex hard-wired or dedicated DSP functions [9] on a chip. With increasingly-complex numerical algorithms, ease of programming was provided by DSPs that used floating-point rather than fixed-point instruction sets [10]. The More-Recent EraSince the mid 1980s, both analog and digital signal processing were strongly affected by a change from NMOS and bipolar/BiMOS to CMOS technology. This allowed a succession of new application areas, such as speech synthesis and coding/decoding [11,12,13], speech recognition [14], and image processing [15,16,17]. At the same time, although more slowly, "digital" CMOS was being adopted for the fabrication of analog signal-processing functions.By exploiting the progress of CMOS developed for microprocessors, digital signal proce...

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confidence: 99%

50 years of signal processing at ISSCC

Thon¹

2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.

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A Video-Codec Chip Set for Multimedia Applications

Ackland

Aghevli

Eldumiati

et al. 1993

At&T Technical Journal

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The multimedia, video‐codec chip set described in this paper represents the first generation in a family of devices that will make possible reliable, cost‐effective storage and transmission of multimedia data, including video. AT&T's multimedia video‐codec complies with international video standards. It supports still‐image and audio compression over a wide range of quality and bit rates; multiplexing of audio, video, and data; and protocol control for a variety of telecommunications options. The codec consists of three chips—a video encoder, a video decoder, and a systems controller—plus one or two digital‐signal processors and a modest amount of industry‐standard, dynamic random‐access memory. In this paper, we examine the potential market for such a device and the performance and capability requirements. We also describe the overall multimedia‐codec architecture and review the video‐signal‐processing operations for standards‐compliant video compression. Finally, we describe the architecture of the encoder, decoder, and systems controller.

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DFS-superMPx: Low-cost parallel processing system for machine vision and image processing

Srini

1995

Lecture Notes in Computer Science

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A real time P*64/MPEG video encoder chip

Cited by 30 publications

References 0 publications

50 years of signal processing at ISSCC

50 years of signal processing at ISSCC

A Video-Codec Chip Set for Multimedia Applications

DFS-superMPx: Low-cost parallel processing system for machine vision and image processing

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