A Real-Time Design Based on FPGA for Expeditious Error Reconciliation in QKD System

Cui, Ke; Wang, Jian; Zhang, Hongfei; Luo, Cheng; Jin, G.; Chen, Teng-Yun

doi:10.1109/tifs.2012.2228855

Cited by 20 publications

(3 citation statements)

References 19 publications

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“…QKD systems can be significantly bigger and more expensive than setups for classical communication. This allows for reconciliation schemes with comparatively high latency and high computational complexity, for example, by extensive usage of pipelining [14,61,62].…”

Section: Comparisonmentioning

confidence: 99%

Efficient information reconciliation for high-dimensional quantum key distribution

Mueller,

Ribezzo,

Zahidy

et al. 2024

Quantum Inf Process

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The information reconciliation phase in quantum key distribution has significant impact on the range and throughput of any QKD system. We explore this stage for high-dimensional QKD implementations and introduce two novel methods for reconciliation. The methods are based on nonbinary LDPC codes and the Cascade algorithm, respectively, and achieve efficiencies close the Slepian–Wolf bound on q-ary symmetric channels.

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Section: Comparisonmentioning

confidence: 99%

Efficient information reconciliation for high-dimensional quantum key distribution

Mueller,

Ribezzo,

Zahidy

et al. 2024

Quantum Inf Process

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“…Efforts to accelerate data processing of measured qubits have led to research on individual modules within the QKD postprocessing. Cui et al [9] focused on an efficient implementation of the error reconciliation module by exploiting FPGA parallelism and pipelining the execution between read, write, and compute operations. Walenta et al [28] made significant strides towards a field-deployable QKD system by integrating control hardware and data processing units.…”

Section: Related Workmentioning

confidence: 99%

Scalable QKD Postprocessing System With Reconfigurable Hardware Accelerator

Venkatachalam,

Shingala,

et al. 2023

IEEE Trans. Quantum Eng.

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Key Distillation is an essential component of every quantum key distribution (QKD) system because it compensates for the inherent transmission errors of a quantum channel. However, the interoperability and throughput aspects of the post-processing components are often neglected. In this paper, we propose a high-throughput key distillation framework that supports multiple QKD protocols, implemented in a field-programmable gate array (FPGA). The proposed design adapts a MapReduce programming model to efficiently process large chunks of raw data across the limited computing resources of an FPGA. We present a novel hardware-efficient integrated post-processing architecture that offers dynamic error correction, mutual authentication with a physically unclonable function, and an inbuilt high-speed encryption application that utilizes the key for secure communication. Additionally, we have developed a semi-automated high-level synthesis (HLS) framework that is compatible with any discrete variable QKD system, showing promising speedup. Overall, the experimental results demonstrate a noteworthy enhancement in scalability achieved through the utilization of a single FPGA platform.

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“…This approach has been previously taken in some QKD and quantum teleportation testbeds. [14][15][16][17][18] The ubiquity and importance of metadata in QC motivates consideration of how the SDC paradigm may be leveraged to build prototype systems. We will show that a typical QC transceiver can be decomposed into components that separate the physical encoding layer from the metadata control layer.…”

Section: Introductionmentioning

confidence: 99%

Software-defined quantum communication systems

Humble

Sadlier

2014

Opt. Eng

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Abstract. Quantum communication (QC) systems harness modern physics through state-of-the-art optical engineering to provide revolutionary capabilities. An important concern for QC engineering is designing and prototyping these systems to evaluate the proposed capabilities. We apply the paradigm of software-defined communication for engineering QC systems to facilitate rapid prototyping and prototype comparisons. We detail how to decompose QC terminals into functional layers defining hardware, software, and middleware concerns, and we describe how each layer behaves. Using the superdense coding protocol as an example, we describe implementations of both the transmitter and receiver, and we present results from numerical simulations of the behavior. We conclude that the software-defined QC provides a robust framework in which to explore the large design space offered by this new regime of communication. © 2014 Society of Photo-Optical Instrumentation Engineers (SPIE) [DOI: 10.1117/1.OE.53.8.086103

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A Real-Time Design Based on FPGA for Expeditious Error Reconciliation in QKD System

Cited by 20 publications

References 19 publications

Efficient information reconciliation for high-dimensional quantum key distribution

Efficient information reconciliation for high-dimensional quantum key distribution

Scalable QKD Postprocessing System With Reconfigurable Hardware Accelerator

Software-defined quantum communication systems

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