A reaction-layer mechanism for the delayed failure of micron-scale polycrystalline silicon structural films subjected to high-cycle fatigue loading

Abstract

Abstract-A study has been made of high-cycle fatigue in 2-µm thick structural films of n + -type, polycrystalline silicon for MEMS applications. Using an "on-chip" test structure resonating at ~40 kHz, such thin-film polysilicon is shown to display "metal-like" stress-life fatigue behavior in room air environments, with failures occurring after lives in excess of 10 11 cycles at stresses as low as half the fracture strength. Through in-situ monitoring of the natural frequency to evaluate the damage evolution by notch-root oxidation and cracking, and using transmission electron microscopy to image such damage, it is concluded that the mechanism of thin-film silicon fatigue involves sequential oxidation and environmentallyassisted cracking in the native SiO 2 layer. This moisture-induced "reaction-layer fatigue" mechanism can also occur in bulk silicon but it is only significant in thin films where the critical crack size for catastrophic failure can be reached by a crack growing within the oxide layer. The susceptibility of thin-film silicon to fatigue failure is shown to be suppressed by the use of alkene-based self-assembled monolayer coatings that prevent the formation of the native oxide.

Very high-cycle fatigue failure in micron-scale polycrystalline silicon films: Effects of environment and surface oxide thickness

“…Finite-element modeling has shown that a decay in the resonance frequency of the resonators during the test can indicate both cracking as well as oxide formation at the notched cantilever beam. 11 The n + -type polysilicon MUMPs devices were fabricated in run 50 of the process and had a structural film thickness of 2 m and a resonance frequency of approximately 40 kHz. To calibrate the capacitive displacement sensing, this type of device was run in a microvision system 9,18 and in situ under a regular optical microscope.…”

“…This is because silicon can be microfabricated to produce complex mechanical structures in thin-film form because of highly developed processing methods directly related to semiconductor electronics processing. 1,2 However, silicon is not an ideal structural material: it is quite brittle and subject to several reliability concerns-most importantly, stiction, 3,4 wear, 3,5 and fatigue [6][7][8][9][10][11][12][13][14][15][16][17][18][19][20][21][22][23][24] -that strongly limit the utility of silicon MEMS devices in commercial and defense applications. In particular, premature fatigue failure can occur when devices are subjected to a large number ͑ϳ10 6 -10 12 ͒ of loading cycles at stress amplitudes well below their monotonic fracture stress.…”

“…[6][7][8][9][10][11][12][13][14][15][16][17][18][19][20][21][22][23][24] Although bulk silicon is not susceptible to fatigue failure in ambient air, 25,26 thin silicon structural films are. 6 In previous studies we proposed that the fatigue of micron-scale polycrystalline silicon ͑polysilicon͒ films is a result of a reaction-layer fatigue process, [10][11][12] whereby high local cyclic stresses induce thickening of the post-release amorphous SiO 2 oxide layer at stress concentrations such as notches. As silica is highly sensitive to environmentally assisted fracture, subcritical ͑stable͒ cracking induced by the presence of moisture occurs within the oxide layer to form a crack large enough to fracture the entire device.…”

“…The purely mechanical alternative mechanisms ignore the role of stress-induced oxide thickening, which has been observed now by several investigators. 11,12,18,22 Furthermore, this brings into question whether the polysilicon films utilized in earlier studies were representative due to their relatively thick post-release oxide scales ͑typically ϳ20-30 nm 12 rather than the order of a magnitude smaller native oxide layers expected for polysilicon 31 ͒. Pierron et al, 32 however, have recently shown that the relatively thick post-release oxide layers found in these devices, which were all fabricated in the multiuser MEMS process ͑MUMPs͒ foundry, 33,34 arise from a galvanic effect of the n + -type silicon and gold in concentrated HF during release of the freestanding structures at the end of the fabrication process, a finding that was later confirmed.…”

“…35 In the present work, we have used on-chip testing and a series of transmission electron microscopy ͑TEM͒ techniques to further investigate fatigue in micron-scale n-type polysilicon MEMS resonators. In light of the discussion [6][7][8][9][10][11][12][13][14][15][16][17][18][19][20][21][22][23][24] outlined above concerning the mechanism of such thin-film silicon fatigue, our prime objective is to examine the susceptibility to fatigue of polycrystalline silicon films with much thinner initial oxide layers, specifically fabricated by the Sandia Ultra-planar, Multi-level MEMS Technology ͑SUM-MiT V™͒ process, and to verify the reproducibility of our previous findings across fabrication runs with respect to fatigue properties and oxide layer thicknesses. Additionally, we characterize the changes in fatigue behavior and the development of reaction layers with environment, in both relatively oxygen-/moisture-free and moisture-rich, high relative-humidity environments, and specifically examine the fatigue susceptibility of polysilicon films with thin initial oxide layers in vacuo, where resistance to fatigue would be expected to be the largest.…”