A radix sorting parallel algorithm suitable for graphic processing unit computing

Abstract

Radix sorting is an essential basic data processing operation in many computer fields. It has important practical significance to accelerate its performance through Graphic Processing Unit (GPU). The heterogeneous parallel computing technology attracts much attention and is widely applied for its effective computation efficiency and parallel real-time data processing capability. Taking advantage of the parallelism of GPU in numerical computation processing, a parallelization design method of the Binary_Least Significant Digit (LSD) first Radix Sorting (B_LSD_RS) algorithm based on Open Computing Language (OpenCL) is proposed. The radix sorting algorithm is divided into multiple kernel tasks, and the kernels are sequentially controlled by the event information transfer. The parallel algorithm is implemented and verified on the GPU + CPU heterogeneous platform. The experimental results show that compared with the performance of the B_LSD_RS sequential algorithm based on AMD Ryzen5 1600X CPU, B_LSD_RS parallel algorithm based on Open Multi-Processing (OpenMP) and B_LSD_RS parallel algorithm based on Compute Unified Device Architecture (CUDA), the B_LSD_RS parallel algorithm based on OpenCL obtained 28.86 times, 11.01 times and 2.14 times speedup in the NVIDIA GTX 1070 computing platform respectively, not only achieves high performance but also achieves performance portability among different GPU computing platforms.

CPP11sort: A parallel quicksort based on C++ threading

“…Some other related parallel sorting algorithms of possible interest, which are beyond the domain of generic parallel in-place sorting on shared-memory CPU architectures, are as follows: parallel radix sort for graphic processing units (GPUs) by Xiao et al, 20 array sort-an adaptive merge sort-based sorting with multithreaded version by Huang et al, 21 parallel quicksort algorithm on optical transpose interconnection systems hyper hexa-cell (OTIS-HHC) optoelectronic architecture by Al-Adwan et al, 22 and bitonic sort on a chained-cubic tree (CCT) interconnection network by Al-Haj Baddar and Mahafzas. 23…”