A Quick and Power Efficient Controlled Voltage Level-Shifter using Cross-Coupled Network

Kiran, Neev; Vignesh, N. Arun; Sravani, K. Girija; Kumari, Ch. Usha; Kanithan, S.; Kumareshan, N.; Prasad, C.

doi:10.1109/icirca51532.2021.9544876

Cited by 4 publications

(2 citation statements)

References 13 publications

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“…[3], [4], proposes a floating voltage level translator that can convert signal levels from low voltage power rail circuit domains to floating power and ground rail circuit domains with high resistance to orbital translation. Subthreshold shifters in [5] and [6], use selfdriven current limiters to detect output errors for robust voltage transitions. The proposed design converts input signals from 0.1 to 1.2V and utilizes a level shifter to convert low voltage levels to high voltage levels, [7], [8].…”

Section: Introductionmentioning

confidence: 99%

New, Fast, High-Performance Level Shifter for Buck DC-DC Converter in 180nm CMOS Technology

El Mouzouade,

El Khadiri,

Tahiri

2023

Wseas Transactions on Electronics

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To reduce power dissipation, the dual supply voltage approach is required for analog circuits in the on-chip integrated circuits. In this paper, a novel circuit of the level shifter for Buck DC-DC Converter using cross-coupled configuration is presented. The proposed work of this paper uses this level shifter to converter voltage of 1.8V to 5V at 180 nm CMOS Technology in Cadence Virtuoso Tool. The propagation delay, energy/transition, and static power were 182.42pS, 0.01 fJ/Transition, and 6 fW, respectively. The final design area is only 60.142 μm2.

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Section: Introductionmentioning

confidence: 99%

New, Fast, High-Performance Level Shifter for Buck DC-DC Converter in 180nm CMOS Technology

El Mouzouade,

El Khadiri,

Tahiri

2023

Wseas Transactions on Electronics

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show abstract

“…Matsuzuka et al 11 use a pre-amplifier comprising a logic error correction circuit which can generating an operation current only when the logic levels of the input and output do not correspond. Literature [14][15][16][17][18][19] are presented on the basis of DCVS architecture. Lanuzza et al 14 combine the multi-threshold CMOS design technique along with novel topological strategies to achieve fast response and low energy consumption.…”

Section: Introductionmentioning

confidence: 99%

An energy‐efficient level shifter based on a differential cascade voltage switch structure

Zhang

Liu

et al. 2022

Circuit Theory & Apps

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Based on differential cascade voltage switch architecture, this paper proposes a level shifter with optimized energy consumption, constructed by stacking diode‐connected NMOS and PMOS transistors and splitting input signals of the two output stages. Eventually, the overlap time of input signals of the two output stages has been reduced, during which there is a considerable short‐current from high voltage source to ground. When implemented in a 110 nm CMOS process, post‐layout netlist simulations show that the proposed level shifter exhibits a 2.31 ns switching delay and 819 fJ energy consumption when converting a 1.5 V input signal into 4.5 V with 10 MHz operational frequency and 15 fF output load.

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Cross Coupled Power Effective Quick Level Shifter

Kiran

Vignesh

Kanithan

et al. 2022

2022 International Conference on Computer Communication and Informatics (ICCCI)

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A Quick and Power Efficient Controlled Voltage Level-Shifter using Cross-Coupled Network

Cited by 4 publications

References 13 publications

New, Fast, High-Performance Level Shifter for Buck DC-DC Converter in 180nm CMOS Technology

New, Fast, High-Performance Level Shifter for Buck DC-DC Converter in 180nm CMOS Technology

An energy‐efficient level shifter based on a differential cascade voltage switch structure

Cross Coupled Power Effective Quick Level Shifter

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