This special issue focuses on new developments in high performance applications, as well as the latest trends in computer architecture and parallel and distributed technologies, and is based on extended, thoroughly revised papers from the 22nd International Symposium on Computer Architecture and High Performance Computing. The authors were invited to provide extended versions of their original papers, taking into account comments and suggestions raised during the peer review process and comments from the audience during the conference. • profiling divergences in graphics processing unit (GPU) applications; • runtime failure rate targeting for energy-efficient reliability in chip microprocessors; • a queuing model-based approach for the analysis of transactional memory (TM) systems;• performance analysis of a parallel linear octree finite element mesh generation scheme;• multiple threads and parallel challenges for large simulations to accelerate a general Navier-Stokes computational fluid dynamics (CFD) code on massively parallel system; • design of energy-efficient hardware TM systems; and • clock synchronization in high-end computing environments: a strategy for minimizing clock variance at runtime.