A Quasi-Newton-based Floorplanner for fixed-outline floorplanning

Ji, Pengli; He, Kun; Wang, Zhengli; Jin, Yan; Wu, Jigang

doi:10.1016/j.cor.2021.105225

Cited by 4 publications

(5 citation statements)

References 31 publications

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“…Therefore, HB+ benchmarks are very hard to handle. In this experiment, we compare the results by our algorithm to multilevel based floorplanners DeFer [14], QinFer [16] and Ref. [2].…”

Section: Resultsmentioning

confidence: 99%

“…It can solve large-scale fixed-outline slicing floorplanning problems. QinFer [16] is a newly published partitioning based fixed-outline floorplanning algorithm with high solution quality. Ref.…”

Section: Resultsmentioning

confidence: 99%

“…In Table V, columns 11-15 present the run-times of different algorithms, in which the run-times of DeFer, Ref. [2] and QinFer are directly cited from [14], [2] and [16], respectively. The computing environment of DeFer was Core Duo 1.86GHz CPU with memory, QinFer was Intel core i5-7500 3.40GHz with 8GB memory, and Ref.…”

Section: Resultsmentioning

confidence: 99%

“…So the time complexity of this fast approximate calculation of partial derivatives still has a linear relationship with the total number of modules, but the difference is that the constant AV G n is no longer related to the truncation constant K 2 as in Eqs. ( 14), ( 15) and (16). Therefore, the cost of calculating all partial derivatives is reduced.…”

Section: Fast Approximate Calculation Of Partial Derivatives Of Poten...mentioning

confidence: 99%

“…Finally, solutions of sub-problems are merged and optimized level by level, leading to a solution of the original problem. Capo [13], DeFer [14], IMF [15] and QinFer [16] are state-of-the-art partitioning-based floorplanning methods. Most of them use hMetis [17] for the partitioning.…”

Section: Introductionmentioning

confidence: 99%

See 4 more Smart Citations

PeF: Poisson’s Equation-Based Large-Scale Fixed-Outline Floorplanning

Peng

Huang

et al. 2023

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Floorplanning is the first stage of VLSI physical design. An effective floorplanning engine definitely has positive impact on chip design speed, quality and performance. In this paper, we present a novel mathematical model to characterize non-overlapping of modules, and propose a flat fixed-outline floorplanning algorithm based on the VLSI global placement approach using Poisson's equation. The algorithm consists of global floorplanning and legalization phases. In global floorplanning, we redefine the potential energy of each module based on the novel mathematical model for characterizing nonoverlapping of modules and an analytical solution of Poisson's equation. In this scheme, the widths of soft modules appear as variables in the energy function and can be optimized. Moreover, we design a fast approximate computation scheme for partial derivatives of the potential energy. In legalization, based on the defined horizontal and vertical constraint graphs, we eliminate overlaps between modules remained after global floorplanning, by modifying relative positions of modules. Experiments on the MCNC, GSRC, HB+ and ami49 x benchmarks show that, our algorithm improves the average wirelength by at least 2% and 5% on small and large scale benchmarks with certain whitespace, respectively, compared to state-of-the-art floorplanners.

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“…Therefore, HB+ benchmarks are very hard to handle. In this experiment, we compare the results by our algorithm to multilevel based floorplanners DeFer [14], QinFer [16] and Ref. [2].…”

Section: Resultsmentioning

confidence: 99%

Section: Resultsmentioning

confidence: 99%