A QCA Implementation of a Configurable Logic Block for an FPGA

Design and simulation of modular 2n to 1 quantum‐dot cellular automata (QCA) multiplexers

“…According to previous studies, several logic gates and computing devices [13] are implemented with QCA. Basic implementations that have been proposed are the binary wire [6], the majority gate, AND gate [14], OR gate [14], NOT gate [14], XOR gate [14], bit-serial adder [15,16], full adder [1,14,15,17,18], multiplier [19], multiplexer [1,2], flip-flop [20][21][22], serial memory [23,24], parallel memory [25], Arithmetic Logic Unit [1,26], microprocessor [26], Programmable Logic Array (PLA) [27], etc.…”

A tiled programmable fabric using QCA

“…Architectures proposed by Lanz et al and Amiri et al take inspiration from the success of modern day CMOS FPGAs [4], [5]. These revolve around the "LUT-CLB-Switch" concept and dedicate considerable area to implement LUTs and CLBs.…”

“…The use of elaborate structures to build CLBs or routing based basic blocks translate to giving up the benefits of QCA [4], [5], [6], [7]. Also, a subtle property of the QCA paradigm which has largely been ignored when architectures were designed for programmable QCA devices is that the same arrangement of cells can function differently with different clock assignments to the cells.…”

“…It resists the tendency to emulate the concepts of traditional programmable devices seen in architectures proposed by Lanz et al and Amiri et al [4], [5]. Though it depends heavily on the concept of selective clocking, the fact that it retains the full power of the Majority gates and its simplicity elevate it to a class beyond that of the routing block based architectures [6], [7].…”

Compact, High Speed and Low power Decoders for Future Generation System Building

“…A 4:16 decoder implemented using 3-input majority gate was first proposed and designed in QCA to address a serial write, parallel read memory by Peskin et.al [2]. But the work mainly focused on the memory design and decoder was just a part of the memory access.…”