A proposal for early warning indicators to detect impending metallization failure of DMOS transistors in cyclic operation

In many automotive applications, repetitive selfheating is the most critical operation condition for LDMOS transistors in smart power ICs. This is attributed to thermomechanical stress in the on-chip metallization, which results from the different thermal expansion coefficients of the metal and the intermetal dielectric. After many cycles, the accumulated strain in the metallization can lead to short circuits, thus limiting the lifetime.Increasing the LDMOS size can help to lower peak temperatures and therefore to reduce the stress. The downside of this is a higher cost. Hence, it has been suggested to use resilient systems that monitor the LDMOS metallization and lower the stress once a certain level of degradation is reached. Then, lifetime requirements can be fulfilled without oversizing LDMOS transistors, even though a certain performance loss has to be accepted.For such systems, suitable sensors for metal degradation are required. This work proposes a floating metal line embedded in the LDMOS metallization. The suitability of this approach has been investigated experimentally by test structures and shown to be a promising candidate. The obtained results will be explained by means of numerical thermo-mechanical simulations.Index Terms-LDMOS transistor, thermo-mechanical stress, metallization failure, metal meander, leakage path forming, meander resistance change, early warning sensor.

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“…This approach was discussed before by the authors in [9]. In this paper, substantially more details are presented.…”

Section: Introductionmentioning

confidence: 95%

On-Chip Sensors to Detect Impending Metallization Failure of LDMOS Transistors Under Repetitive Thermo-Mechanical Stress

Ritter

Pham

Pfost

2016

IEEE Trans. Semicond. Manufact.

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“…10. This slightly overestimates the measurement results of 500 • C, see [14]. This is due to the homogenization of the thin metal layers, vias, and contacts, necessary for fast simulations as discussed before.…”

Section: A Temperaturementioning

confidence: 75%

“…The simulation approach used for this work was already presented in [13], the first experimental results in [14]- [16]. In this paper, the results are extended by additional simulations and experiments.…”

Section: Introductionmentioning

confidence: 95%

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Efficient Simulation of Thermo-Mechanical Stress in the On-Chip Metallization of Integrated Power Semiconductors

Pham

Ritter

Pfost

2017

IEEE Trans. Device Mater. Relib.

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Integrated power semiconductors are often used for applications with cyclic on-chip power dissipation. This leads to repetitive self-heating and thermo-mechanical stress, causing fatigue on the on-chip metallization and possibly destruction by short circuits. Because of this, an accurate simulation of the thermo-mechanical stress is needed already during the design phase to ensure that lifetime requirements are met. However, a detailed thermo-mechanical simulation of the device, including the on-chip metallization is prohibitively time-consuming due to its complex structure, typically consisting of many thin metal lines with thousands of vias. This paper introduces a two-step approach as a solution for this problem. First, a simplified but fast simulation is performed to identify the device parts with the highest stress. After, precise simulations are carried out only for them. The applicability of this method is verified experimentally for LDMOS transistors with different metal configurations. The measured lifetimes and failure locations correlate well with the simulations. Moreover, a strong influence of the layout of the on-chip metallization lifetime was observed. This could also be explained with the simulation method. Index Terms-Integrated power technologies, integrated circuit modeling, power semiconductor devices, on-chip metallization, thermo-mechanical stress, degradation, reliability.

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“…The solution adopted in [ 25 , 26 ] was a metal meander or multiple such meanders between adjacent metal lines on different layers which extend all across the entire AA. This approach comes with major drawbacks: (i) a sensing structure extending across the entire area of the device increases the metal-to-oxide ratio, rendering the device metallization far more prone to IMD cracking than desired (i.e., less reliable from the beginning), and (ii) it makes it somewhat difficult to obtain information regarding the precise location of the defect.…”

Section: The Test Chipmentioning

confidence: 99%

Test Structure Design for Defect Detection during Active Thermal Cycling

Florea

Simon

Bojita

et al. 2022

Sensors

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Integrated power ICs acting as smart power switches for automotive or industrial applications are often subjected to active thermal cycling. Consequently, they undergo significant self-heating and are prone to various failure mechanisms related to the electro-thermo-mechanical phenomena that take place in the device metallization. In this article a test structure consisting of a lateral DMOS transistor equipped with several integrated sensors is proposed for metallization fatigue assessment. The design of the test structure is presented in detail, alongside with design considerations drawn from the literature and from simulation results. The testing procedure is then described, and experimental results are discussed. The experimental data provided by the integrated sensors correlated with the electro-thermal simulation results indicate the emergence of a failure mechanism and this is later confirmed by failure analysis. Conclusions are further drawn regarding the feasibility of using the proposed integrated sensors for monitoring defects in power ICs.

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A proposal for early warning indicators to detect impending metallization failure of DMOS transistors in cyclic operation

Cited by 6 publications

References 11 publications

On-Chip Sensors to Detect Impending Metallization Failure of LDMOS Transistors Under Repetitive Thermo-Mechanical Stress

On-Chip Sensors to Detect Impending Metallization Failure of LDMOS Transistors Under Repetitive Thermo-Mechanical Stress

Efficient Simulation of Thermo-Mechanical Stress in the On-Chip Metallization of Integrated Power Semiconductors

Test Structure Design for Defect Detection during Active Thermal Cycling

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