A Proposal for an Associative Memory Using Magnetic Films

Raffel, J.I.; Crowther, Thomas S.

doi:10.1109/pgec.1964.263736

Cited by 13 publications

(7 citation statements)

References 2 publications

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“…, with hardware segmentation, seem unfeasible and uneconomical on a computer with another type of memory structure such a s an associative memory. (Feldman [1965], Ewing and Davies [1964], Gall [1964], McAteer [1964, Raffel [1964]) or a Lesser memory (Lesser [1968]). These objections a r e covered in more detail in (Hoffman [1969]).…”

Section: B Access Control In Proposed Systemsmentioning

confidence: 99%

The Formulary Model for Access Control and Privacy in Computer Systems

Hoffman¹

2018

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This thesis presents a model for engineering the user interface for large data base systems in order to maintain flexible access controls over sensitive data. The model is. independent of both machine and data base structure, and is sufficiently modular to allow cost-effectiveness studies on access mechanisms. Access control is based on sets of procedures called formularies. The decision on whether a user can read, write, update, etc. , data is controlled by programs ' A companion report, llThe engineering of access control mechanics in physics data bases, " (SLAC Report No. 118) is in preparation.

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Section: B Access Control In Proposed Systemsmentioning

confidence: 99%

The Formulary Model for Access Control and Privacy in Computer Systems

Hoffman¹

2018

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“…Since then, associative memories have been implemented using tunnel diodes [41,42], evaporated organic diode arrays [7], magnetic cores [41,[43][44][45][46][47][48], plated wires [41,49], semiconductors [50], transfluxors [51], biax cores [52], laminated ferrites [53], magnetic films [54], solenoid arrays [55], bicore thin-film sandwiches [41], multiaperture logic elements [56], and integrated circuits [57]. The capacity of these associative memories is usually limited by factors such as half-select noise which limit the word length, and interrogation drive problems which limit the number of words.…”

Section: Hardware Implementationmentioning

confidence: 99%

Associative Processor Architecture—a Survey

Yau

Fung

1977

ACM Comput. Surv.

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A survey of the architecture of various associative processors is presented with emphasis on their characteristics, categorization, and implementation, and especially on recent developments. Based on their architecture, associative processors are classified into four categories, namely fully parallel, bit-serial, word-serial and block-oriented. The fully parallel associative processors are divided into two classes, word-orgamzed and distributed logic associative processors. Keywords and Phrases:Associative processors, computer architecture, categomzation, implementation, hardware, large-scale integration, fully parallel, bit-serial, word-serial, block-ormnted, distributed logic CR Categories: 3. 80, 6.22, 6.30, 6.31, 6.32, 6.33, 6.34 INTRODUCTIONAn associative processor can generally be described as a processor which has the following two properties: 1) Stored data items can be retrieved using their content or part of their content (instead of their addresses); and 2) data transformation operations, both arithmetic and logical, can be performed over many sets of arguments with a single instruction. Because of these parallel processing characteristics, associative processors have a much faster data processing rate than conventional sequential computers, and hence are more effective in handling many types of information processing problems such as information storage and retrieval of rapidly changing databases, fast search of a large database, arithmetic and logical operations on large sets of data, control and executive functions in large-scale computer systems, radar signal tracking and processing, and weather prediction computations. However, because of their relatively high implementation cost, associative processors are usually used in conjunction with standard sequential computer systems so that many required highspeed parallel processing tasks which cannot be effectively executed by sequential processors are performed by associative processors. Because of the rapid development of large-scale integrated-circuit (LSI) technology, the implementation cost of associative processors will be greatly reduced and it is anticipated that associative processors will be used more extensively for enhancing the performance of many special-purpose and general-purpose computer systems. Although there have been several papers providing either tutorials or literature surveys on associative processors [1-5], a number of new developments have not been described in any of the previous survey papers. In this paper, we will present a survey of the architecture of various associative processors, with emphasis on their characteristics, categorization, and implementation, and especially recent developments.

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“…(Feldman [1965], Ewing and Davies [1964], Gall [1964], McAteer [1964], Raffel [1964]) or a Lesser memory (Lesser [1968]). These objections a r e covered in more detail in (Hoffman [1969] For any particular interpretation, the installation must supply the procedures listed in Table.1.…”

Section: B Access Control In Proposed Systemsmentioning

confidence: 99%

Formulary Model for Access Control and Privacy in Computer Systems.

Hoffman¹

1970

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A Proposal for an Associative Memory Using Magnetic Films

Cited by 13 publications

References 2 publications

The Formulary Model for Access Control and Privacy in Computer Systems

The Formulary Model for Access Control and Privacy in Computer Systems

Associative Processor Architecture—a Survey

Formulary Model for Access Control and Privacy in Computer Systems.

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