A Programmable Impedance Tuner With Finite SWRs for Load-Pull Measurement of Handset Power Amplifiers

Bae, Younghwan; Kim, Unha; Kim, Jung-Hyun

doi:10.1109/lmwc.2015.2407154

Cited by 8 publications

(14 citation statements)

References 5 publications

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“…Furthermore, the operation frequency of all the tuners is 1.5-2.1 GHz, and 33.3% BW is achieved, accordingly. In Figure 8a, the measured IMD3 of the tuner using the single-branch 8-staked FET switches was better than −70 dBc at 30 dBm (f 1 = 1.8 GHz, f 2 = 1.7 GHz, 2f 1 − f 2 = 1.9 GHz), demonstrating significantly improved results compared to the conventional electronic tuners [1,2]. As expected, the worst IMD3 was occurred under SWR = 4 because of the low gate bias of the on-state single-branch 8-stacked FET switch, as shown Figure 8a.…”

Section: Fabrication and Measurementmentioning

confidence: 99%

“…Therefore, there is a strong demand for improved impedance tuners from mobile phone makers. Various coupler/reflection-type electronic impedance tuners that are fast, cost-effective, and small-sized with a programmable operation have been conceptually reported as an alternative of the conventional mechanical tuner [1,2]. However, the effectiveness of the reported electronic tuners for a PA load-pull test should be carefully verified with the following performance requirements: (1) operating frequency; (2) programmable operation;…”

Section: Introductionmentioning

confidence: 99%

“…(3) standing wave ratio (SWR) coverage; (4) impedance resolution; (5) power handling capability; and (6) linearity performance. To increase the limited SWR coverage (=2 or 6) and impedance resolution of the PIN diode-type tuner [1], the Varactor diode-type tuner has been reported, with a performance of SWR ≤ 8 [2]. However, the Varactor diode-type tuner exhibits considerable non-linearity behavior in a high power condition due to the increased non-linearity characteristic of Varactor diode devices.…”

Section: Introductionmentioning

confidence: 99%

“…Figure 1a shows a conceptual schematic of the proposed coupler/reflection-type impedance tuner. A conventional PIN diode-type tuner [1] needs many PIN diodes to cause variation of the magnitude part through varying the electrical length (EL) 'θ 1 and θ 2 ' under terminated impedance of the transmission line, where R T = 0 (short), and feasible SWR coverage of the tuner is restricted because of an increased insertion loss of switch elements. Therefore, the terminated impedance variation technique is proposed to achieve magnitude variation and a high impedance resolution without additional switch elements.…”

Section: Introductionmentioning

confidence: 99%

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A Programmable Impedance Tuner with a High Resolution Using a 0.18-um CMOS SOI Process for Improved Linearity

2019

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In this paper, a novel coupler/reflection-type programmable electronic impedance tuner combined with switches that were fabricated by a 0.18-um complementary metal–oxide–semiconductor (CMOS) silicon-on-insulator (SOI) process is proposed for replacement of the conventional mechanical tuner in power amplifier (PA) load-pull test. By employing the multi-stacked field-effect transistors (FETs) as a single-branch switch, the proposed tuner has the advantage of precise impedance variation with systematic and magnitude and phase adjustment. Additionally, it led to high standing wave ratio (SWR) coverage and a good impedance resolution with a high power handling capability. Furthermore, the double-branch based on multi-stacked FET was applied to switches for additional enhancement of the intermodulation distortion (IMD) performance through the mitigated drain-source voltage of the single-FET. Drawing upon the measurement results, we demonstrated that SWR changed from 2 to 6 sequentially with a 12–15° phase angle step over a mid/high-band range of a 1.5–2.1 GHz band for 3G/4G handset application. In addition, the PA load-pull measurement results obtained using the proposed tuners verified their practicality and competitive performance with mechanical tuners. Finally, the measured linearity using the double-branch switch demonstrated the good IMD3 performance of −78 dBc, and this result is noteworthy when compared with conventional electronic impedance tuners.

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Section: Fabrication and Measurementmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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A Programmable Impedance Tuner with a High Resolution Using a 0.18-um CMOS SOI Process for Improved Linearity

2019

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“…With rapid development of wireless communications for the Internet of Things (IoT), RF integrated circuits (ICs) with compact chip size have become essential to reduce the unit cost of production . To realize compact chip area, a power amplifier should be designed using a CMOS process by which the analog and digital circuits are integrated .…”

Section: Introductionmentioning

confidence: 99%

A CMOS power amplifier using split input and output transformers to minimize its chip area

Jeong

Shin

et al. 2016

Microw. Opt. Technol. Lett.

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In this study, we propose a layout technique to reduce the chip area of differential RF CMOS power amplifiers in which input and output transformers are utilized as input and output baluns. To minimize the chip area of the CMOS power amplifier, we split a conventional spiral transformer into two identical parts, thereby making full use of the wasted area in the conventional power amplifier. Using the proposed split transformers in the input and output transformers, we successfully reduce the chip area of the CMOS power amplifier based on a differential structure. To verify the feasibility of the proposed split cascode structure, we designed a 2.4‐GHz CMOS power amplifier using a 180‐nm SOI RF CMOS process. With an IEEE 802.11n WLAN modulated signal, we obtain a maximum output power of 9.73 dBm. From the measured results, we verify the feasibility of the proposed split transformer structure for RF CMOS power amplifier applications. © 2016 Wiley Periodicals, Inc. Microwave Opt Technol Lett 58:1443–1446, 2016

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High‐power impedance tuner utilising substrate‐integrated evanescent‐mode cavity technology and external linear actuators

Semnani

Shaffer

Sinanis

et al. 2019

IET microw. antennas propagation

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A 100 W electronically controlled impedance tuner is introduced and experimentally investigated here. The proposed tuner is composed of two individually controlled coupled evanescent‐mode (EVA) cavity resonators implemented on a printed circuit board (PCB) using substrate‐integrated waveguide (SIW) technology. The contactless tuning mechanism relies on two high‐resolution external linear actuators controlling the gap size of each resonator with submicron accuracy. A 3.3 GHz prototype tuner successfully handled up to 100 W of input power with ∼90% Smith chart coverage at the centre frequency and about 52% bandwidth demonstrating at least 50% coverage. Exhibiting low loss of 0.56 dB and very high stability as well, the proposed impedance tuner is a viable solution for high‐power applications where electronic precise tuning is desired.

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A Programmable Impedance Tuner With Finite SWRs for Load-Pull Measurement of Handset Power Amplifiers

Cited by 8 publications

References 5 publications

A Programmable Impedance Tuner with a High Resolution Using a 0.18-um CMOS SOI Process for Improved Linearity

A Programmable Impedance Tuner with a High Resolution Using a 0.18-um CMOS SOI Process for Improved Linearity

A CMOS power amplifier using split input and output transformers to minimize its chip area

High‐power impedance tuner utilising substrate‐integrated evanescent‐mode cavity technology and external linear actuators

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