A profiler for a heterogeneous multi-core multi-FPGA system

Abstract

The TMD is a heterogeneous multi-FPGA system that uses the Message Passing Interface (MPI) programming model to build systems comprised of processors and hardware engines implemented on FPGAs, all interacting using MPI messages. This thesis implements a profiling system that can monitor communication calls and user states. The data is compatible with Jumpshot, a visualizer already used for software-based MPI applications. We demonstrate the capability of the profiler on a number of applications and show that the profiler can be used for multiple FPGAs across multiple boards.ii Acknowledgements First and foremost I would like to thank my supervisor Professor Paul Chow for his guidance and technical advice which were of highest value throughout the course of this MASc. I would also like to thank Emanuel and Alex, for their suggestions and conversations; Manuel, Arun and Chris for their expertise advice; and all the remaining group members: Andrew, Danny, David, Ali, Keith, Daniel Ly, Danyao, Richard, Tom, Mike, Nasim, and Matt for their support. Last but not the least, Professor João Cardoso who first contacted the University of Toronto and provided guidance throughout all my undergrad in Portugal.iii

MPI as a Programming Model for High-Performance Reconfigurable Computers

“…An overlap can be seen between communications and computation, which is not seen in the blocking version (not shown). For more details on this particular project see the work presented by Nunes et al [2008].…”

“…Inspired by this, a similar profiler for TMD-MPI was implemented, which works with hardware computing elements in FPGAs. The TMD-MPI profiler [Nunes et al 2008] connects hardware blocks called tracers to the TMD-MPE, which provides all the information needed to profile the messagepassing activity over the TMD-MPI network. A similar tracker is attached to a hardware engine or to an embedded processor to log computing events, such as pipeline busy signals that can help to determine the hardware engine utilization.…”

A Survey of Embedded Software Profiling Methodologies

“…Various profiling approaches are explored by different researchers in the world. In [17], Daniel has proposed a profiler to profile large heterogeneous Multi-core Multi-FPGA systems. Such systems are built of multiple boards and each board comprises of multiple parallel software and hardware execution nodes.…”

Efficient Design Space Exploration at System Level with Automatic Profiler Instrumentation

“…Their environment, however, cannot handle dedicated hardware modules. Nunes, et al proposed a profiler construction for multi-FPGA systems with high-level descriptions of systems 16) . Their approach has a similar concept with ours in assuming that systems are developed using specific communication channels between functionalities and the profilers are developed to cooperate with the channels.…”