IEEE 2002 International Conference on Communications, Circuits and Systems and West Sino Expositions
DOI: 10.1109/icccas.2002.1178936
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A precise sample-and-hold circuit topology in CMOS for low voltage applications with offset voltage self correction

Lopes Silva Paulo Henrique
1
,
Luís H. C. Ferreira
2
,
Robson Luiz Moreno
3
et al.
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