A Practical Framework to Study Low-Power Scheduling Algorithms on Real-Time and Embedded Systems

Abstract

With the advanced technology used to design VLSI (Very Large Scale Integration) circuits, low-power and energy-efficiency have played important roles for hardware and software implementation. Real-time scheduling is one of the fields that has attracted extensive attention to design low-power, embedded/real-time systems. The dynamic voltage scaling (DVS) and CPU shutdown are the two most popular techniques used to design the algorithms. In this paper, we firstly review the fundamental advances in the research of energy-efficient, real-time scheduling. Then, a unified framework with a real Intel PXA255 Xscale processor, namely real-energy, is designed, which can be used to measure the real performance of the algorithms. We conduct a case study to evaluate several classical algorithms by using the framework. The energy efficiency and the quantitative difference in their performance, as well as the practical issues found in the implementation of these algorithms are discussed. Our experiments show a gap between the theoretical and real results. Our framework not only gives researchers a tool to evaluate their system designs, but also helps them to bridge this gap in their future works.

Range smart cluster monitor based guesstimate approach for resource scheduling in small size clusters

“…The percentage of idle resources is high and the objective is to use the resources which are idle from long time and having good resource capacity. The state of the node [24] is assigned as:…”

A Formal Approach for RT-DVS Algorithms Evaluation Based on Statistical Model Checking

“…The variation of the charge in both wells is described as a system of ordinary differential equations: The template of the battery mainly consists of two locations and , which indicate that the battery is available and empty, as shown in Figure 5. The invariant on location represents the variation of the charge in both wells based on formula (8). When there is no charge left in the available charge well, the template moves to location.…”

“…Lin et al [8] have designed a framework including hardware settings and software implementation to evaluate power aware scheduling algorithms on Intel PXA255 XScale processor, namely, real energy. In addition, this framework was also used for testing the implementation of DVS algorithms.…”

“…Many of these algorithms focus on periodic tasks, assuming that the tasks timing attributes including period, worst-case execution time (WCET, at the maximum available processor frequency), and deadline are known in advance. These algorithms have been experimentally studied using simulation based approaches both on software simulators [5,6] and on hardware platforms [7,8]. However, simulation based evaluation is time consuming and often not completely reliable.…”