2014 24th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) 2014
DOI: 10.1109/patmos.2014.6951901
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A power-efficient FPGA-based self-adaptive software defined radio

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Cited by 4 publications
(2 citation statements)
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“…This uses Vivado HLS to design the PL component and receives up to 7X speedup from HW acceleration. [23] proposes a scalable cluster of Zynq ZC702 boards, controlled by a Zedboard that acts as a task mapper to partition data flows across the Zynq FPGAs and ARM cores. tFlow rapid reconfiguration software was used to build FPGA images from a library of pre-built modules.…”
Section: B Sdr On Heterogeneous Systemsmentioning
confidence: 99%
“…This uses Vivado HLS to design the PL component and receives up to 7X speedup from HW acceleration. [23] proposes a scalable cluster of Zynq ZC702 boards, controlled by a Zedboard that acts as a task mapper to partition data flows across the Zynq FPGAs and ARM cores. tFlow rapid reconfiguration software was used to build FPGA images from a library of pre-built modules.…”
Section: B Sdr On Heterogeneous Systemsmentioning
confidence: 99%
“…and flexibility, while also facilitating a simple software programmable interface to higher layers of the radio. A number of research groups are exploring ways to use these platforms in cognitive radios [69].…”
Section: Fpgas For Radio Platformsmentioning
confidence: 99%