A porous Si based novel isolation technology for mixed-signal integrated circuits

Kim, Han-Su; Chong, Kyuchul; Xie, Ya‐Hong; DeVincentis, Marc; Itoh, T.; Becker, Annette; Jenkins, K.A.

doi:10.1109/vlsit.2002.1015433

Cited by 5 publications

(1 citation statement)

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“…Other, more exotic bulk approaches to improving substrate resistivity or isolation have also been proposed for RF-SOC applications. These include the use of silicon-on-insulator (SOI) [10], silicon-on-sapphire (SOS) [11], silicon-on-anything (SOA) [12], porous silicon [13], through substrate vias [14], and bulk micromachining [15]. None of these techniques have found their way into widespread use, although there have been some notable successes in niche applications.…”

Section: Substrate and Isolation Technologies For Rf-soc Applicatmentioning

confidence: 99%

Silicon technology tradeoffs for radio-frequency/mixed-signal "systems-on-a-chip"

Larson¹

2003

IEEE Trans. Electron Devices

100

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Silicon technology has progressed over the last several years from a digitally oriented technology to one well suited for microwave and RF applications at a high level of integration. Technology scaling, both at the transistor and back-end metallization level, has driven this progress. CMOS technology is ideally suited for low-noise amplification and receiver applications, but the fundamental breakdown voltage is lower than that of equivalent Si/SiGe HBTs. High-quality passive devices are equally important, and improvements in metallization technology are resulting in higher quality inductors. This paper summarizes the silicon technology issues associated with RF "system-on-a-chip" applications.

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Section: Substrate and Isolation Technologies For Rf-soc Applicatmentioning

confidence: 99%

Silicon technology tradeoffs for radio-frequency/mixed-signal "systems-on-a-chip"

Larson¹

2003

IEEE Trans. Electron Devices

100

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Foundry technology for 130nm and beyond SoC

Tang

Diaz

Chao

et al.

Proceedings of the IEEE 2003 Custom Integrated Circuits Conference, 2003.

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Current foundry technology menus are so rich that they are sufficient to provide single chip solutions to a wide variety of desktop, portable and communication systems. At 130-nm and 90-nm generations, many of the device characteristics are no longer a straightfonvard extension ofpast generations [1][2][3][4]. Special attention should be made for mixed-signal chip design. Ajudicious choice of devices and careful trade-off between version options should be made to maximize the benefit from the latest foundry offerings.

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Low capacitance and high isolation bond pad for high-frequency RFICs

Chong

Xie

2005

IEEE Electron Device Lett.

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A porous Si based novel isolation technology for mixed-signal integrated circuits

Cited by 5 publications

References 0 publications

Silicon technology tradeoffs for radio-frequency/mixed-signal "systems-on-a-chip"

Silicon technology tradeoffs for radio-frequency/mixed-signal "systems-on-a-chip"

Foundry technology for 130nm and beyond SoC

Low capacitance and high isolation bond pad for high-frequency RFICs

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