A polarization-induced InN-based tunnel FET without physical doping

Abstract

A new design approach for TFETs without physical doping is provided and demonstrated based on the polarization effect for the first time in this paper. And a polarization-induced InN-based TFET (PI-InN-TFET) is proposed and investigated by two-dimensional numerical simulations. Compared with the conventional physical doping InN-based TFET (D-InN-TFET), the proposed device features the formation of P-type source and N-type drain induced by the polarization effect near the InN-based heterojunctions without the need for any physical doping, which makes it possible for the PI-InN-TFET to avoid the random dopant fluctuation (RDF) and the problems related to the high thermal annealing techniques. Simulation results exhibit that the performance of the PI-InN-TFET is better than that of the optimized D-InN-TFET. Besides, the proposed PI-InN-TFET could be realized by the mature fabrication processing of the field-plated GaN-based HEMTs and could be further improved by introducing other techniques such as L-shaped TFET, T-shaped TFET.

Vertical polarization-induced doping InN/InGaN heterojunction tunnel FET with hetero T-shaped gate*

“…Device models in this paper are mainly based on our early research. [16,22,31] The nonlocal BTBT model is used for the consideration of the spatial variation of the energy band and the more accurate calculation of the tunneling process. The Shockley-Read-Hall and Auger recombination models are adopted to consider the effect of carrier recombination.…”

“…And based on the po-larization effect near III-nitride-based heterointerfaces, [17][18][19][20][21] the lateral polarization-induced InN-based TFETs (PI-InN-TFET) have been demonstrated by our group. [22] This also opens a new path to the further development of TFETs without physical doping processing. In addition, in order to improve the on-state current, some effective methods, such as gate engineering, energy band engineering, and source-pocket doping [23][24][25][26][27][28][29][30] have been proposed and investigated.…”

A Study on the Performance of Gate-All-Around Heterojunction Tunnel Field-Effect Transistors Based on Polarization Effect

“…Recent studies have shown that exploiting the polarization properties of III-nitride alloy heterostructures in TFETs design, such as InN/GaN and InGaN/AlInN, can notably increase the carrier tunneling probability, thereby enhancing both the ON-state current ( I ON ) and I ON / I OFF . This strategy has gained great attention in TFET applications. − In III-nitride heterostructures, the mismatch in lattice constants of different materials can induce strain in the crystal, generating piezoelectric polarization effects at the heterojunction interface. The difference of spontaneous polarizations together with the piezoelectric polarization in the heterostructure will produce polarization surface charges at the interface of heterojunction, thereby augmenting the interface electric field and increasing tunneling probability. − Although there exists strong polarization electric field in the InN/GaN heterojunction TFETs, the deep quantum well (QW) generated at the heterointerface will deteriorate the switching characteristics of the device simultaneously.…”

Representation of an engineered double-step structure SOI-TFET with linear doped channel for electrical performance improvement: a 2D numerical simulation study

“…Nowadays, the continuous down-scaling of channel length (feature size) in CMOS technology has led to several problems. The most important cases of these problems are short 3 Author to whom any correspondence should be addressed. channel effects, high off-state leakage current and poor subthreshold slope (SS) [1][2][3][4][5][6][7][8][9][10].…”

“…The most important cases of these problems are short 3 Author to whom any correspondence should be addressed. channel effects, high off-state leakage current and poor subthreshold slope (SS) [1][2][3][4][5][6][7][8][9][10]. The smallest value of subthreshold slope that can be achieved in a MOSFET is 60 mV dec −1 because the transport of charge carriers over the potential barrier is a thermionic process [10].…”