A Peripheral-Free True Random Number Generator Based on Integrated Circuits Enabled by Atomically Thin Two-Dimensional Materials

Abstract

A true random number generator (TRNG) is essential to ensure information security for Internet of Things (IoT) edge devices. While pseudorandom number generators (PRNGs) have been instrumental, their deterministic nature limits their application in securitysensitive scenarios. In contrast, hardware-based TRNGs derived from physically unpredictable processes offer greater reliability. This study demonstrates a peripheral-free TRNG utilizing two cascaded three-stage inverters (TSIs) in conjunction with an XOR gate composed of monolayer molybdenum disulfide (MoS 2 ) field-effect transistors (FETs) by exploiting the stochastic charge trapping and detrapping phenomena at and/or near the MoS 2 /dielectric interface. The entropy source passes the NIST SP800-90B tests with a minimum normalized entropy of 0.8780, while the generated bits pass the NIST SP800-22 randomness tests without any postprocessing. Moreover, the keys generated using these random bits are uncorrelated with near-ideal entropy, bit uniformity, and Hamming distances, exhibiting resilience against machine learning (ML) attacks, temperature variations, and supply bias fluctuations with a frugal energy expenditure of 30 pJ/bit. This approach offers an advantageous alternative to conventional silicon, memristive, and nanomaterial-based TRNGs as it obviates the need for extensive peripherals while harnessing the potential of atomically thin 2D materials in developing low-power TRNGs.

A 2D Cryptographic Hash Function Incorporating Homomorphic Encryption for Secure Digital Signatures

“…Note that this circuit has been reported in a recent work. [47] Figure 3a shows the overall circuit schematic of the key generation module where the outputs from stage 3 of two different TSI's, V S3 and V′ S3 are, respectively, fed as inputs to the XOR gate whereas Figure 3b,c, respectively, show the optical images of cascaded TSI module 1 and an XOR gate. While an inverter, or a NOT gate implements logical negation and outputs a voltage representing the opposite logical state to its input, an XOR gate implements an exclusive OR and provides a high output only when one of its two inputs is high.…”

A stochastic encoder using point defect in two-dimensional materials

“…Finally, e-beam evaporation was performed to deposit 20 nm Pd to serve as the contacts for the WSe2 FETs. More details on device fabrication can be found in the Methods section and in our earlier works [21][22][23][24][25][26]. Fig.…”