A Parallel Algorithm for Connected Component Labelling of Gray-scale Images on Homogeneous Multicore Architectures

Niknam, Mehdi; Thulasiraman, Parimala; Camorlinga, Sergio

doi:10.1088/1742-6596/256/1/012010

Cited by 9 publications

(8 citation statements)

References 4 publications

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“…Niknam et al [23] is the first paper presenting the parallelization of Suzuki algorithm on a 16-cores AMD Opteron 885. The max speedup is ×2.5 on 4 threads for 256×256.…”

Section: Pyramidal Border Mergingmentioning

confidence: 99%

Parallel Light Speed Labeling: an efficient connected component algorithm for labeling and analysis on multi-core processors

Cabaret

Lacassagne

Etiemble

2016

J Real-Time Image Proc

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International audienceIn the last decade, many papers have been published to present sequential connected component labeling (CCL) algorithms. As modern processors are multi-core and tend to many cores, designing a CCL algorithm should address parallelism and multithreading. After a review of sequential CCL algorithms and a study of their variations, this paper presents the parallel version of the Light Speed Labeling for Connected Component Analysis (CCA) and compares it to our parallelized implementations of State-of-the-Art sequential algorithms. We provide some benchmarks that help to figure out the intrinsic differences between these parallel algorithms. We show that thanks to its run-based processing, the LSL is intrinsically more efficient and faster than all pixel-based algorithms. We show also, that all the pixel-based are memory-bound on multi-socket machines and so are inefficient and do not scale, whereas LSL, thanks to its RLE compression can scale on such high-end machines. On a 4×15-core machine, and for 8192×8192 images, LSL outperforms its best competitor by a factor ×10.8 and achieves a throughput of 42.4 gigapixel labeled per second

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“…Niknam et al [23] is the first paper presenting the parallelization of Suzuki algorithm on a 16-cores AMD Opteron 885. The max speedup is ×2.5 on 4 threads for 256×256.…”

Section: Pyramidal Border Mergingmentioning

confidence: 99%

Parallel Light Speed Labeling: an efficient connected component algorithm for labeling and analysis on multi-core processors

Cabaret

Lacassagne

Etiemble

2016

J Real-Time Image Proc

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“…Algorithm 5 gives the complete algorithm. (1,0), (8,4), (10,4), (9,5), (10,5), (12,12), (3,13), (11,13), (4,14) { } Algorithm 5: SparseCCL…”

Section: A General Parameterizable Ordered Sparsecclmentioning

confidence: 99%

“…Most of CCL algorithms used to be sequential ones developed on single-core processors [7] [3]. Recently, new parallel algorithms were developed for multi-core processors [13] [5], SIMD processors [18] [11] [8] and GPUs [14] [9]. These algorithms are very efficient for natural images but not for very low density images (very few pixels set to one) like those generated in HEP experiment.…”

Section: Introductionmentioning

confidence: 99%

SparseCCL: Connected Components Labeling and Analysis for sparse images

Hennequin

Couturier

Gligorov

et al. 2019

2019 Conference on Design and Architectures for Signal and Image Processing (DASIP)

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Connected components labeling and analysis for dense images have been extensively studied on a wide range of architectures. Some applications, like particles detectors in High Energy Physics, need to analyse many small and sparse images at high throughput. Because they process all pixels of the image, classic algorithms for dense images are inefficient on sparse data. We address this inefficiency by introducing a new algorithm specifically designed for sparse images. We show that we can further improve this sparse algorithm by specializing it for the data input format, avoiding a decoding step and processing multiple pixels at once. A benchmark on Intel and AMD CPUs shows that the algorithm is from ×1.6 to ×2.5 faster on sparse images.

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“…CCL algorithms are often required to be optimized to run in real-time and have been ported on a wide set of parallel machines [1] [13]. After an era on single-core processors, where many sequential algorithms were developed [7] and codes were released [2], new parallel algorithms were developed on multicore processors [15] [6].…”

Section: Introductionmentioning

confidence: 99%

Designing efficient SIMD algorithms for direct Connected Component Labeling

Hennequin¹,

Masliah²,

Lacassagne³

2019

Proceedings of the 5th Workshop on Programming Models for SIMD/Vector Processing

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Connected Component Labeling (CCL) is a fundamental algorithm in computer vision, and is often required for real-time applications. It consists in assigning a unique number to each connected component of a binary image. In recent years, we have seen the emergence of direct parallel algorithms on multicore CPUs, GPUs and FPGAs whereas, there are only iterative algorithms for SIMD implementation. In this article, we introduce new direct SIMD algorithms for Connected Component Labeling. They are based on the new Scatter-Gather, Collision Detection (CD) and Vector Length (VL) instructions available in the recent Intel AVX512 instruction set. These algorithms have also been adapted for multicore CPU architectures and tested for each available SIMD vector length. These new algorithms based on SIMD Union-Find algorithms can be applied to other domains such as graphs algorithms manipulating Union-Find structures.

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A Parallel Algorithm for Connected Component Labelling of Gray-scale Images on Homogeneous Multicore Architectures

Cited by 9 publications

References 4 publications

Parallel Light Speed Labeling: an efficient connected component algorithm for labeling and analysis on multi-core processors

Parallel Light Speed Labeling: an efficient connected component algorithm for labeling and analysis on multi-core processors

SparseCCL: Connected Components Labeling and Analysis for sparse images

Designing efficient SIMD algorithms for direct Connected Component Labeling

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