A novel W-band bottom-LO-configured sub-harmonic mixer IC in 130-nm SiGe BiCMOS

Yang, Xin; Xiao-li, XU; Sun, Zheng; Shibata, Takayuki; Yoshimasu, Toshihiko

doi:10.1109/eumic.2015.7345096

Cited by 3 publications

(1 citation statement)

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“…In the conventional top-LO-configured CECCTP SHM, however, the bottom RF stage suppresses the generation of 2* f LO signal and results in a high requirement of LO power. Hence, we propose an improved bottom-LO-configured CECCTP SHM IC with a tail current source for W-band applications [19]. The improved SHM topology has following features: (1) the required LO power is only −7 dBm, (2) the conversion gain is flattened and not sensitive to LO power, (3) the DC power consumption is only 2.2 mW.…”

Section: Introductionmentioning

confidence: 99%

80-GHz-band low-power sub-harmonic mixer IC with a bottom-LO-configuration in 130-nm SiGe BiCMOS

Yang

Xiao-li

Shibata³

et al. 2016

Int. J. Microw. Wireless Technol.

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In this paper, a W-band (80 GHz) sub-harmonic mixer (SHM) IC is designed, fabricated and measured in 130-nm SiGe BiCMOS technology. The presented SHM IC makes use of a common emitter common collector transistor pair structure with a bottom-LO-configuration to decrease the LO power requirement and a tail current source to flatten the conversion gain. On-chip Marchand balun is designed for W-band on-wafer measurements. The SHM IC presented in this paper has exhibited a conversion gain of 3.9 dB at 80 GHz RF signal with an LO power of only −7 dBm at 39.5 GHz. The mixer core consumes only 0.68 mA at a supply voltage of 3.3 V.

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Section: Introductionmentioning

confidence: 99%