A CMOS compatible high-voltage shallow trench isolation (STI) drain extended MOS (DEMOS) transistor is fabricated and its electrical characteristics are studied. A local p-well (PW) plate served as a reduced surface field is adopted to enhance the breakdown voltage (BV) by reducing the effective doping concentration of the accumulation region. The conformalmapping method is used to evaluate the BV of this 2-D STI DEMOS structure theoretically. A BV model, which relates the BV to the width of the accumulation region x a and the overlap/underlap O p between the local PW plate and the STI, is derived. The predictions of this model agree very well with both the experimental data and the technology computer-aided-design simulations. Index Terms-Drain extended MOS (DEMOS), lateral doublediffused MOS (LDMOS), reduced surface field (RESURF).