A Novel Vector-Scalar Architecture for Mobile Baseband Processing

Abstract

The fast development of wireless communication protocols brings in big challenges for designing mobile baseband processor. In this paper, we propose a novel multi-core vector-scalar architecture with heuristic instruction set that can achieve high performance processing with budgeted power consumption and area cost across major computing blocks inside different communication protocols. This proposed architecture consists of four Vector-Scalar Engine Pairs (VSEPs). Each pair can support two data streams for multi-protocol application. The vector-scalar engine pair shares a common pipeline and the vector engine (VE) mainly deals with the symbol level data processing of wireless communication standard, such as OFDM (Orthogonal Frequency-Division Multiplexing) demodulation, while at the same time the scalar engine (SE) calculates the key parameters based on the heuristic instruction. We verify the performance of the architecture through benchmarking typical algorithms such as FFT (Fast Fourier Transform), Channel Estimation and MIMO (Multiple-Input Multiple-Output) detection. The results show that this proposed architecture can achieve better performance in average for 4G wireless communication.