A Novel Technique for Improving Hardware Trojan Detection and Reducing Trojan Activation Time

Salmani, Hassan; Tehranipoor, Mohammad; Plusquellic, Jim

doi:10.1109/tvlsi.2010.2093547

Cited by 245 publications

(141 citation statements)

References 18 publications

(20 reference statements)

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“…Salmani et al in [10] propose to modify the circuit description in order to increase the probabilities of signal when it is lower than a specific threshold. This is done with the insertion of so-called dummy scan flip-flops.…”

Section: B Hts Detection Methods Based On Ht Activationmentioning

confidence: 99%

“…low controllability signals, such as introduced in [10]. This idea is based on the assumption that it is likely that an attacker will attach a HT on signals having a low controllability.…”

Section: Rare Value Based Logic Encryptionmentioning

confidence: 99%

“…They consist in incorporating into the ICs some features that should improve the HT detectability [5,10]. Rare value HT circuit model in [6].…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

A novel hardware logic encryption technique for thwarting illegal overproduction and Hardware Trojans

Dupuis

Natale

et al. 2014

2014 IEEE 20th International on-Line Testing Symposium (IOLTS)

178

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-Hardware piracy is a threat that is becoming more and more serious these last years. The different types of threats include mask theft, illegal overproduction, as well as the insertion of malicious alterations to a circuit, referred to as Hardware Trojans. To protect circuits from overproduction, circuits can be encrypted so that only authorized users can use the circuits. In this paper, we propose an encryption technique that also helps thwarting Hardware Trojan insertion. Assuming that an attacker will attach a Hardware Trojan to signals with low controllability in order to make it stealthy, the principle of the encryption is to minimize the number of signals with low controllability.

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Section: B Hts Detection Methods Based On Ht Activationmentioning

confidence: 99%

“…low controllability signals, such as introduced in [10]. This idea is based on the assumption that it is likely that an attacker will attach a HT on signals having a low controllability.…”

Section: Rare Value Based Logic Encryptionmentioning

confidence: 99%

See 1 more Smart Citation

A novel hardware logic encryption technique for thwarting illegal overproduction and Hardware Trojans

Dupuis

Natale

et al. 2014

2014 IEEE 20th International on-Line Testing Symposium (IOLTS)

178

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“…Trojan [6] hidden is mainly bypassing the network security scanning and defensive behavior-based detection. Signature-based scanning hidden technologies: Trojan deformation technology and encryption technology.…”

Section: Hiding Program Of Web Malicious Codementioning

confidence: 99%

Research on Hiding Technology of Web Malicious Code

Zhang

Wang

Zhao

2011

AEF

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Abstract. In modern network confrontation, it is very important to improve the viability of web malicious code. According to the generation and propagation characteristics, we propose the web malicious code hidden solutions which are based on deformation and encryption. Combining with MS09002 vulnerabilities we give an application example of web Trojan hidden. Test results show that the proposed integrated solution has the better capacity of avoiding virus killing and the stronger hidden performance. The significant improvement of viability of web malicious code is very important of application. Introductions

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“…Salmani et al propose a technique to increase the node's toggle rate by inserting dummy flip-flop, making node's toggle rate more than preset threshold. When threshold set as 10-4, it needs adding 16 dummy flip-flops into s38417 benchmark and 0.8% area overhead [5]. Side-channel analysis-based approaches can detect Trojan by comparing the side-channel parameter of pending test and Trojan-free ICs without triggering Trojan [4].…”

Section: Introductionmentioning

confidence: 99%

A Method of Obtaining ASIC Schematic Using Scan Chain

Chen¹,

Liu²,

Li³

2015

Proceedings of the 2015 International Industrial Informatics and Computer Engineering Conference

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Abstract. Hardware Trojan is easy to be embedded during IC's design and manufacturing. Mostly used Trojan detection technique based on side-channel approach need a Trojan-free instance, and could not ensure Trojan-free instance's consistent of schematic. With the help of scan chain, one of the widely used design for testability (DFT) technology, a novel approach is proposed to obtain the schematic of Application Specific Integrated Circuit (ASIC). It is verified and tested by formal verification and hardware simulation. This approach not only could help to obtain the Trojan-free instance which has the same schematic as the ordinary design, but also provide a new method to other Hardware Trojan detection techniques.

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A Novel Technique for Improving Hardware Trojan Detection and Reducing Trojan Activation Time

Cited by 245 publications

References 18 publications

A novel hardware logic encryption technique for thwarting illegal overproduction and Hardware Trojans

A novel hardware logic encryption technique for thwarting illegal overproduction and Hardware Trojans

Research on Hiding Technology of Web Malicious Code

A Method of Obtaining ASIC Schematic Using Scan Chain

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