A Novel Scaling Free Vectoring CORDIC and its FPGA Implementation

Abstract

This research paper proposes a novel scaling free CORDIC algorithm to operate in vectoring mode which computes absolute magnitude and phase angle of input vector. Using this algorithm, the micro rotation of the vector is unidirectional and totally scaling free. The range of convergence is successfully extended to cover entire coordinate space without increasing any hardware complexity.Further a 16 bit Scaling free vectoring CORDIC architecture based on this proposed algorithm is synthesized on FPGA Xilinx Virtex-5 device using Verilog hardware description language. Synthesized results show throughput every clock cycle with maximum operating frequency of 243.55MHz and demonstrate very low dynamic power consumption.

CORDIC-like method for solving Kepler’s equation

“…The CORDIC algorithm requires positive and negative rotations to have always the same scale K n after n iterations (Appendix B). But since we could not pull out K n from the iteration, we can depart from this concept and allow for only zero and positive rotations which could be called unidirectional (Jain et al 2013) or one-sided (Maharatna et al 2004). The decision to rotate or not to rotate becomes…”